Semiconductor device having patterned SOI structure and...

Details Semiconductor device having patterned SOI structure and... Semiconductor device having patterned SOI structure and...

2005-03-01

2005-03-01

Zarneke, David (Department: 2829)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Multiple layers

C438S479000, C438S761000

Reexamination Certificate

active

06861374

ABSTRACT:
A method for fabricating a semiconductor device, including forming a first insulation film, a first semiconductor layer, and a second insulation film in sequence in first to third regions of a semiconductor substrate; removing the first insulation film, the first semiconductor layer, and the second insulation film in the first region and the second insulation film in the third region; selectively forming a second semiconductor layer in the first region of the semiconductor substrate and on the first semiconductor layer in the third region; and removing the second insulation film.

REFERENCES:
patent: 6746901 (2004-06-01), Kasahara et al.
Robert Hannon, et al., “0.25mm Merged Bulk DRAM and SOI Logic Using Patterned SOI”, Symposium on VLSI Technology Digest of Technical Papers, 2000 (2 Pages).

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