Semiconductor device having multi-layer copper line and...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

Other Related Categories

C438S687000

Type

Reexamination Certificate

Status

active

Patent number

06884710

Description

ABSTRACT:
A semiconductor device includes a lower copper line formed on a substrate, an interlayer insulating layer formed on the lower copper line, and an upper copper line formed on the interlayer insulating layer. A copper via contact extends through the interlayer insulating layer for electrically connecting the lower copper line and the upper copper line. A concave recess is formed within the lower copper line and is vertically aligned and arranged below the copper via contact. A patterned barrier layer is formed at a bottom portion of the concave recess, such that the lower copper line and the copper via contact are directly electrically connected at an interface along sides of the concave recess, without an intervening barrier layer.

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patent: 6211085 (2001-04-01), Liu
patent: 6376353 (2002-04-01), Zhou et al.
patent: 6476489 (2002-11-01), Yoo et al.
patent: 6613664 (2003-09-01), Barth et al.
patent: 799286 (1995-04-01), None
patent: 10-261715 (1998-09-01), None

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