Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1982-09-20
1985-07-02
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
364131, 365185, 365114, 365218, G11C 1140
Patent
active
045272590
ABSTRACT:
A highly integrated semiconductor device has two or more circuits employing non-volatile memory elements built into the same semiconductor substrate, along with read, write and erase, which may operate independently of each other. The memory includes first and second circuit sections, the first circuit section including a first non-volatile memory which is electrically writable and is erasable by ultra-violet rays, and the second circuit section including a second non-volatile memory which is electrically writable and electrically erasable, but which is not erasable by ultra-violet rays. The first circuit section may be a ROM section and the second circuit section may be a CPU in a microcomputer semiconductor device. The first non-volatile memory elements are preferably FAMOS type elements and the second non-volatile memory elements are preferably MNOS elements or F-N elements.
REFERENCES:
patent: 3916268 (1975-10-01), Engeler et al.
patent: 3924246 (1975-12-01), Scherer
patent: 4103312 (1978-07-01), Chang et al.
Fears Terrell W.
Nippon Electric Co. Ltd.
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