Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2005-04-26
2005-04-26
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S585000, C438S285000
Reexamination Certificate
active
06884705
ABSTRACT:
A semiconductor device includes a hetero grain stack gate (HGSG). The device includes a semiconductor substrate having a surface, a gate insulating layer formed over the surface of the semiconductor substrate, and a gate electrode formed over the gate insulating layer, wherein the gate electrode includes a lower poly-SiGe layer having a columnar crystalline structure, and an upper poly-Si layer having a random crystalline structure. In one embodiment, the gate electrode includes a lower poly-SiGe layer having a columnar crystalline structure, an intermediate layer having an random crystalline structure, and an upper poly-Si layer having a columnar crystalline structure. A method of manufacturing a semiconductor device having an HGSG comprises depositing a gate insulating layer over a surface of a semiconductor substrate, depositing a lower poly-SiGe layer having a columnar crystalline structure over the gate insulating layer, depositing an amorphous Si layer over the lower poly-SiGe layer, and crystallizing the amorphous Si layer to obtain an upper poly-Si layer having a random crystalline structure.
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Jong Bae Geum
Kim Sang Su
Lee Jung Il
Lee Nae In
Rhee Hwa Sung
Lindsay Jr. Walter L.
Niebling John F.
Samsung Electronics Co,. Ltd.
Volentine Francos & Whitt PLLC
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