Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-12-17
2004-07-06
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S349000, C257S355000
Reexamination Certificate
active
06759714
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor fabrication technology; and, more particularly, to a semiconductor device having a heat release structure that uses a silicon-on-insulator (SOI) substrate, and a method for fabricating the semiconductor device.
DESCRIPTION OF RELATED ART
The operation of a semiconductor device inevitably generates heat. Semiconductor devices that consume much electric power, such as power devices and high-frequency devices, generate a lot of heat when they are operated. The heat not only degrades the performance of the semiconductor devices, but also has a negative effect on the other neighboring circuits.
The heat is originated from the resistance component inside the semiconductor devices. To reduce the heat generation, the wires and contacts should be formed of low-resistant materials. However, this idea has a limit in suppressing the heat generation due to the limit in designing and processing.
Conventionally, a heat-releasing plate is attached to the rear surface of a substrate in the lower part of an integrated circuit (IC), when a semiconductor device is packaged.
FIG. 1
is a cross-sectional view showing a conventional semiconductor device having a heat release structure. Referring to
FIG. 1
, the conventional semiconductor device having a heat-releasing structure includes: a silicon-on-insulator (SOI) substrate
10
formed of a bottom silicon substrate
11
, a buried oxide
12
and a top silicon layer
13
; an IC
14
formed on the top silicon layer
13
of the SOI substrate
10
; and a gold-plated material layer
15
on the rear surface of the bottom silicon substrate
11
.
Here, if the thickness of the bottom silicon substrate
11
is maintained by the thickness of a wafer, the heat-releasing effect is deteriorated. So, the rear surface of the bottom silicon substrate
11
is polished to be thin and gold-plated.
Meanwhile, although
FIG. 1
shows an example where the IC
14
is formed on the SOI substrate
10
, the processes of polishing the rear surface and gold plating can be applied to a case where the IC is formed on a bulk silicon substrate, too.
However, No matter what silicon substrate is used, i.e., bulk silicon substrates and SOI substrates alike, the conventional method deteriorates the heat-releasing efficiency, because the substrate itself releases the heat. Particularly, when the SOI substrate
10
is used, the heat-releasing efficiency drops more due to the low heat conductivity of a buried oxide
12
, compared to when the bulk silicon substrate is used.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a semiconductor device having a heat-releasing structure with high heat-releasing efficiency, and a method for fabricating the semiconductor device.
In accordance with an aspect of the present invention, there is provided a semiconductor device, comprising: a silicon-on-insulator (SOI) substrate including a bottom silicon substrate, a buried insulation layer, and a top silicon layer; an integrated circuit formed on the top silicon layer of the SOI substrate; and a tunneling region formed between the bottom silicon substrate and the top silicon layer, which are under the integrated circuit.
In accordance with another aspect of the present invention, there is provided a method for fabricating a semiconductor device, comprising the steps of: preparing an SOI substrate including a bottom silicon substrate, a buried insulation layer and a top silicon layer; forming an integrated circuit on the top silicon layer of the SOI substrate; and forming a tunneling region between the bottom silicon substrate and the top silicon layer, which are under the integrated circuit.
The semiconductor device fabrication method of the present invention forms an integrated circuit (IC) on a silicon-on-insulator (SOI) substrate, and forms a tunneling region by removing the buried insulation layer in the lower part of the IC to thereby release the heat and high-frequency noise generated in the IC to the outside of the substrate quickly through the tunneling region. In the mean time, the heat-releasing efficiency can be improved more by flowing air or gases having high heat conductivity to the tunneling region, or by forming unevenness on the surface of the upper and lower part of the tunneling region.
REFERENCES:
patent: 6245600 (2001-06-01), Geissler et al.
patent: 6429486 (2002-08-01), Abe et al.
patent: 6570217 (2003-05-01), Sato et al.
patent: 1020000045286 (2000-07-01), None
Kim Jong Dae
Kim Sang Gi
Lee Dae Woo
Park II-Young
Roh Tae Moon
Blakely & Sokoloff, Taylor & Zafman
Electronics and Telecommunications Research Institute
Wojciechowicz Edward
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