Semiconductor device having dual gate and method of formation

Details Semiconductor device having dual gate and method of formation Semiconductor device having dual gate and method of formation

1998-09-23

1999-11-23

Fahmy, Wael M.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438199, 438299, 438770, 438775, H01L 218234

Patent

active

059899620

ABSTRACT:
The invention comprises a method of forming a semiconductor device is provided where a first gate insulator layer 26 is formed on an outer surface of semiconductor substrate 24. A mask body 28 is formed to cover portions of the insulator layer 26. The exposed portions of the layer 26 are subjected to a nitridation process to form a nitride layer 30. A second oxidation process forms a thick gate oxide layer 32. The nitride layer 30 inhibits the growth of oxide resulting in a single integrated device having gate insulator layers having two different thicknesses such that high voltage and low voltage transistors can be formed on the same integrated circuit.

REFERENCES:
patent: 4151006 (1979-04-01), De Graaff et al.
patent: 5254489 (1993-10-01), Nakata
patent: 5327002 (1994-07-01), Motoyoshi
patent: 5497021 (1996-03-01), Tada
patent: 5502009 (1996-03-01), Lin
patent: 5576226 (1996-11-01), Hwang
patent: 5716863 (1998-02-01), Arai
patent: 5763922 (1998-06-01), Chau

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