Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-10-26
2001-01-09
Wilczewski, Mary (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S524000, C438S525000, C438S305000, C438S582000, C438S302000, C438S259000, C438S589000, C438S595000
Reexamination Certificate
active
06171916
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention.
The present invention relates to a semiconductor device including an element, for example, a MOS transistor which has a so-called buried gate electrode, and to a manufacturing method thereof.
2. Description of the Related Art
With recent development in miniaturization and integration of semiconductor devices, techniques for reducing the resistance of electrodes and a variety of wires have been considered for increasingly miniaturized and highly integrated semiconductor devices. One of promising techniques is a so-called salicide method which forms a silicide layer on each of a gate electrode and source/drain electrodes of a transistor. This method forms a refractory metal film such as a Ti film or the like overlying a gate electrode and a source/drain structure, and reacts the refractory metal film with the gate electrode and the source/drain electrodes by a heat treatment to form a silicide layer.
On the other hand, a buried gate transistor has been proposed for reducing a difference of level or height in a semiconductor device to achieve further miniaturization and integration. Specifically, the buried gate transistor is fabricated by forming a strip-like groove in a semiconductor substrate, and filling a conductive material into this groove to form a gate electrode.
In the buried gate transistor having a salicide structure as mentioned above, if source/drain electrodes are formed with a small junction depth, for example, as is the case of an LDD structure, silicide layers are formed to intrude into the semiconductor substrate so that the silicide layers extend deeper than the junction depth of the source/drain electrodes, thus causing a fear of short-circuiting with the semiconductor substrate.
JP-A-2-46775 discloses a semiconductor device which has a silicide layer formed on a portion of the surface of a buried gate electrode as a contact with an upper electrode.
Although, according to JP-A-2-46775, the disclosed technique does eliminate the problem of the silicide layer formed deeper than the junction depth of the source/drain electrodes, another problem arises as follows. In a buried gate transistor, an insulating film for isolating a gate electrode from a semiconductor substrate is formed by thermal oxidization on the inner wall of a groove together with a gate insulating film. Although this insulating film has substantially the same thickness as the gate insulating film, reliable separation of a silicide layer on the gate electrode from a silicide layer on source/drain electrodes is difficult for the insulating film of such a thickness to achieve. In this case, therefore, the resultant transistor will inevitably suffer from significant degradation in characteristics.
JP-A-7-30104 in turn discloses a semiconductor device which has a side-wall insulating film formed inside of a groove for forming a gate electrode therein so as to physically and electrically separate a silicide layer on the gate electrode and silicide layers on source/drain electrodes by this side-wall insulating film in a silicide forming step.
This side-wall insulating film, however, does not cover a side wall of the gate electrode, so that the gate electrode is located in a close proximity to the source/drain electrodes only with an intervening gate insulating film, thus incurring a danger of leading to possible short-circuiting therebetween and an increase in parasitic capacitance.
Further, JP-A-8-32063 discloses a semiconductor device which has a silicon oxide film formed on the bottom surface of a groove for forming a gate electrode therein, and a titanium film deposited thereon, with the silicon oxide film and the titanium film being thermally treated to form a titanium silicide film on the interface therebetween.
In this semiconductor device, however, no silicide films are formed on source/drain electrodes. Neither is there formed a side-wall insulating film for covering the side wall of the gate electrode.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a highly reliable semiconductor device and a manufacturing method thereof for ensuring high speed operations while maintaining high performance by applying a salicide structure to a buried gate transistor to largely reduce a difference of level or height in the device and to reduce the resistance of a gate electrode and source/drain electrodes.
To achieve the above object, a semiconductor device according to the present invention comprises a semiconductor substrate formed with a groove, a gate electrode formed over a bottom surface of the groove in the semiconductor substrate through a gate insulating film, a pair of impurity diffusion layers formed on both sides of the gate elect rode in a region of the semiconductor substrate, a first silicide layer formed on the gate electrode, a second silicide layers formed on the pair of impurity diffusion layers, and side-wall insulating films formed in the groove of the semiconductor substrate to cover the gate electrode and both side surfaces of the first silicide layer, wherein each of the side-wall insulating films has a thickness larger than that of the gate insulating film.
Also, a method of manufacturing a semiconductor device in accordance with a first aspect of the present invention comprises the steps of forming a first insulating film over a semiconductor substrate, forming a groove through the first insulating film and in the semiconductor substrate, forming a second insulating film on the semiconductor substrate including an interior of the groove, processing the second insulating film to form side-wall insulating films covering only side-wall surfaces of the groove, forming a third insulating film on the semiconductor substrate exposed on a bottom surface of the groove, forming a silicon film on the semiconductor substrate including the inside of the groove, removing a superficial layer of the silicon film until the first insulating film is exposed, implanting an impurity into the silicon film and the semiconductor substrate, diffusing the impurity to form a pair of impurity diffusion layers on both sides of the silicon film in the semiconductor substrate, removing a superficial layer of the silicon film in the groove with the first insulating film used as a mask, removing the first insulating film, forming a refractory metal film on the semiconductor substrate including the silicon film and the pair of impurity diffusion layers, reacting the silicon film with the refractory metal film and reacting the pair of impurity diffusion layers with the refractory metal film by thermal treatment to form a silicide layer on the silicon film and on each of the pair of impurity diffusion layers, and removing a non-reacted portion of the refractory metal film.
Further,a method of manufacturing a semiconductor device in accordance with a second aspect of the present invention comprises the steps of forming a groove in a semiconductor substrate, forming a first insulating film inside the groove, forming a silicon film on the semiconductor substrate including the inside of the groove, removing a superficial layer of the silicon film to fill the inside of the groove with the silicon film through the first insulating film, implanting an impurity into the silicon film and the semiconductor substrate to from a pair of impurity diffusion layers on both sides of the silicon film in the semiconductor substrate, thermally treating a surface of the semiconductor substrate to form side-wall insulating films between the silicon film and the pair of impurity diffusion layers, wherein each of the side-wall insulating films has a width gradually extending from a bottom to a superficial layer, forming a refractory metal layer on the semiconductor substrate including the silicon film and the pair of impurity diffusion layers, reacting the silicon film with the refractory metal film and reacting the pair of impurity diffusion layers with the refractory metal film by thermal treatment to form a silicide layer on the silicon film and
Hazama Katsuki
Sugawara Masahiro
Nippon Steel Corporation
Park James
Pollock Vande Sande & Amernick
Wilczewski Mary
LandOfFree
Semiconductor device having buried gate electrode with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having buried gate electrode with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having buried gate electrode with... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2499272