Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-05-10
2011-05-10
Vu, David (Department: 2829)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S190000
Reexamination Certificate
active
07939399
ABSTRACT:
A new technique enables providing a stress-inducing alloy having a highly stress-inducing region and a region which is processable by standard processing steps suitable for use in a commercial high volume semiconductor device manufacturing environment. The regions may be formed by a growth process with a varying composition of the growing material or by other methods such as ion implantation. The highly stress-inducing region near the channel region of a transistor may be covered with an appropriate cover.
REFERENCES:
patent: 6891192 (2005-05-01), Chen et al.
patent: 7605407 (2009-10-01), Wang
patent: 7611951 (2009-11-01), Ueno et al.
patent: 2006/0172511 (2006-08-01), Kammler et al.
patent: 2008/0067545 (2008-03-01), Rhee et al.
patent: 2008/0121929 (2008-05-01), Lai et al.
Foreign Associate Transmittal Letter dated Jan. 21, 2008.
Translation of Official Communication Issued Nov. 22, 2007.
Gehring Andreas
Mowry Anthony
Trui Bernhard
Wei Andy
Wiatr Maciej
Campbell Shaun
Globalfoundries Inc.
Vu David
Williams Morgan & Amerson P.C.
LandOfFree
Semiconductor device having a strained semiconductor alloy... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having a strained semiconductor alloy..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having a strained semiconductor alloy... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2656721