Electronic digital logic circuitry – With test facilitating feature
Patent
1996-01-29
1998-02-17
Westin, Edward P.
Electronic digital logic circuitry
With test facilitating feature
326 46, 371 251, H03K 1900, H03K 19173
Patent
active
057195048
ABSTRACT:
In a semiconductor device including a logic gate combination circuit and a plurality of scan registers or flip-flops, a scan path is provided to serially connect the flip-flops to each other. Scan clock signals are sequentially generated and transmitted to the scan registers. A delay time among the scan clock signals is approximately smaller than an operation time of each of the scan registers.
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patent: 5225724 (1993-07-01), Scarra' et al.
patent: 5252917 (1993-10-01), Kadowaki
patent: 5317205 (1994-05-01), Sato
patent: 5495487 (1996-02-01), Whetsel, Jr.
NEC Corporation
Roseen Richard
Westin Edward P.
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