Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-03-04
1998-09-29
Quach, T. N.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438305, 438563, H01L 21225, H01L 21336
Patent
active
058145451
ABSTRACT:
Portions of a semiconductor device (10,30) are formed from a dielectric layer (16,38,46) which is deposited using a plasma enhanced chemical vapor deposition (PECVD) process which adds trimethylphosphite as a dopant source during the deposition. A first embodiment forms sidewall spacers (17) adjacent to a gate structure (14) and forms doped regions (19) under the sidewall spacers (17) by annealing the dielectric layer (16) and driving phosphorus into a substrate (11). A second embodiment uses the trimethylphosphite doped film as an interlevel dielectric layer (38) which can be planarized to provide a flat surface for the formation of metal interconnect lines. A third embodiment of the present invention uses the trimethylphosphite doped film as a passivation layer (46) which is deposited in a single step process and has a phosphorus concentration to getter mobile ions.
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Denton Heidi L.
Grynkewich Gregory W.
Ilderem Vida
Pearse Jeffrey
Seddon Kenneth M.
Collopy Daniel R.
Motorola Inc.
Quach T. N.
Seddon Kenneth M.
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