Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-04-17
1999-04-20
Chaudhuri, Olik
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257316, 36518501, 36518526, H01L 29788
Patent
active
058959505
ABSTRACT:
The invention relates to a non-volatile memory with floating gate, in particular a Flash-EPROM, in which writing takes place through injection of hot electrons into the floating gate and in which erasing takes place through injection of hot holes. To keep the write and erase voltages sufficiently low, p-type zones which locally increase the background doping concentration of the p-type substrate are provided around the n-type source and drain zones. These p-type zones cause an increased field strength at the drain zone whereby hot electrons are formed at the pinch-off point also at lower voltages. This increased background concentration in addition reduces the breakdown voltage of the pn junction of the source and drain zones, so that hot holes for erasing can be formed by pn breakdown at comparatively low voltages. The device is particularly suitable for being integrated into a signal processing IC manufactured in a standard process, such as a microcontroller.
REFERENCES:
patent: 3868187 (1975-02-01), Masuoka
patent: 4295265 (1981-10-01), Horiuchi et al.
patent: 4434433 (1984-02-01), Nishizawa
patent: 4491859 (1985-01-01), Hijiya et al.
patent: 4503524 (1985-03-01), McElroy
patent: 4698787 (1987-10-01), Mukherjee
patent: 4766088 (1988-08-01), Kono et al.
patent: 4958321 (1990-09-01), Chang
patent: 5311049 (1994-05-01), Tsuruta
patent: 5337274 (1994-08-01), Ohji
patent: 5371027 (1994-12-01), Walker
patent: 5426769 (1995-06-01), Pawloski
patent: 5445987 (1995-08-01), Kuroda et al.
patent: 5455793 (1995-10-01), Amin et al.
patent: 5457652 (1995-10-01), Brahmbhatt
patent: 5467305 (1995-11-01), Bertin
Hsu et al, "A High Speed, Low Power P-Channel Flash EEPROM using Silicon Rich Oxide as Tunneling, Dielectri", Solid State Devices and Materials, Tsukuba, 1992. pp. 140-142.
Haddad et al "An Investigation of Erase-Mode Dependent Hole Trapping in Flash EEPROM Memory, Cell", IEEE Electron Device Letters, vol. 11 No. 11, Nov. 1990, pp. 514-516.
Cuppens Roger
Kronert Alwin N.
Walker Andrew J.
Cao Phat X.
Chaudhuri Olik
U.S. Philips Corporation
Wieghaus Brian J.
LandOfFree
Semiconductor device having a non-volatile memory and method of does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having a non-volatile memory and method of , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having a non-volatile memory and method of will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2249598