Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-07-25
2003-08-05
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S216000, C438S591000, C438S785000, C438S786000
Reexamination Certificate
active
06602753
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 2000-225740, filed Jul. 26, 2000; and No. 2000-383878, filed Dec. 18, 2000, the entire contents of both of which are incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device and, in particular, a method of manufacturing a semiconductor device where a metal oxide is employed as a gate insulating film. This invention relates to a field effect transistor wherein a titanium oxide is employed as a gate insulating film.
2. Description of the Related Art
The gate insulating film to be employed in a CMOS (Complementary Metal-Oxide Semiconductor) of so-called sub-0.1 &mgr;m generation is required to meet the specification of 1.5 nm based on an SiO
2
film. Since an SiO
2
film having a thickness of 1.5 nm is insufficient in insulating properties in view of the direct tunnel current, technical studies on so-called High-K insulating films are now extensively conducted for realizing a capacity corresponding to that of an SiO
2
film having a thickness of 1.5 nm while making it possible to secure a sufficient degree of insulating properties by physically increasing the film thickness by using a material exhibiting a larger relative dielectric constant than that of SiO
2
.
One of the most important problems on the occasion of applying this High-K material to the gate insulating film of CMOS is how to control the interface between the High-K material and an Si substrate. An SiO
2
layer is inevitably produced at this interface between the High-K material and an Si substrate, so that the controlling of the thickness of this SiO
2
layer becomes a very serious technical problem. Since the entire thickness of a laminate structure containing the SiO
2
layer to be formed at the interface and the High-K material is required to be confined to that corresponding to 1.5 nm of an SiO
2
layer, the thickness of this interface SiO
2
layer is required to be confined to less than 1.5 nm.
Several methods have been already developed for inhibiting the formation of an SiO
2
layer at the interface between the High-K material and an Si substrate. As for the method of forming the High-K material, there have been proposed various methods. In this specification however, two specific methods will be exemplified for illustrating the conventional method of suppressing the formation of this interface SiO
2
layer.
A first example is a method wherein the surface of a Si substrate is covered with an SiON or SiN layer, on which a metal constituting a High-K material is physically deposited and the metal thus deposited is oxidized to form a metal oxide (a High-K gate insulating film). By the terms “High-K gate insulating film”, it generally means an oxide of one or more kinds of metal, and hence the expression “metal oxide” will be employed hereinafter synonymous with this High-K material. According to this method wherein the High-K material is formed through the oxidation of metal, the oxidation of the surface of Si substrate can be certainly partially suppressed due to the interposition of the SiON or SiN layer. However, the effect of suppressing the oxidation in this method is reported to be insufficient, allowing an SiO
2
layer to be formed to a thickness of 3 nm or more. Further, since this method is accompanied with a restriction that a temperature of as high as 700° C. is typically required for the oxidation of metal in order to obtain a desired High-K material, it is expected to be difficult to obtain the aforementioned specification corresponding to that of SiO
2
film having a thickness of as high as 1.5 nm for instance. Moreover, the introduction of nitrogen atoms into the interface leads to the generation of side effects such as a lattice defect, thereby often inviting deterioration in the electric properties of the interface.
A second example is a method wherein a metal constituting a High-K material is thinly deposited on the surface of an Si substrate and then, annealed in vacuum, after which a metal oxide is deposited on the annealed metal layer by a reactive sputtering method using a mixed gas comprising a strictly controlled mixing ratio of oxygen/argon gases. According to this method, the thin metal film initially deposited functions as a barrier layer against the oxidation of the surface of an Si substrate on the occasion of subsequently depositing a metal oxide on the Si substrate. This method however is accompanied with a problem in the aforementioned step of vacuum annealing after the deposition of a metal. Although it is not made clear in this conventional method with respect to the role of the vacuum annealing, the metal is permitted to react with Si due to this annealing, and as a result, a metal silicide is expected to be produced, inevitably resulting in the diffusion of metal atoms into the Si substrate. The metal atoms diffused into the Si substrate would become a trapping center for the carriers to thereby deteriorate the performance of the device.
Additionally, there is still a problem which is common to both of these conventional methods, i.e. a problem of re-growth of SiO
2
at the interface in a step subsequent to the formation of a gate insulating film. It is required, for the purpose of electrically activating a high-concentration impurity region, to heat-treat this impurity region at a temperature of as high as 900° C. or more. When the substrate is exposed to such a high temperature, a new growth of an SiO
2
film is caused to generate at the interface between the High-K film and the Si substrate. The oxygen acting as a source to bring about this additional oxidation is quite frequently formed of by a residual in the metal oxide.
The reason for adopting a method of forming a metal oxide layer by the post-oxidation of a metal layer that has been formed in advance using a metal in either of the aforementioned two different conventional methods is that if a metal oxide is directly deposited on the Si substrate or on the SiON(SiN) film, the Si substrate or the SiON(SiN) film is also oxidized during the process of depositing the metal oxide, thus resulting in the formation of an interface film having an increased thickness. However, as explained above, although these conventional methods are aimed at suppressing the formation of an oxide interface layer, there are problems that they involve the side effect of deterioration in the electric properties of the resultant device, and also that the effect of suppressing the formation the interface layer according to these conventional methods is still insufficient.
Incidentally, as for the materials which are expected to be useful for the formation of the High-K gate insulating film, they include various kinds of metal oxide such as TiO
2
, Ta
2
O
5
, ZrO
2
, HfO
2
, La
2
O
3
, etc. Among these metal oxides, TiO
2
(titanium oxide) is known as being the most prospective material for the formation of a ferroelectric gate insulating film in view of the actual use thereof in LSIs up to date as a dielectric material for the capacitor of a DRAM, etc. However, TiO
2
is featured in that it is highly reactive with silicon as compared with other kinds of metal oxide material, indicating that TiO
2
is prone to form an interface oxide film mainly comprising SiO
2
as compared with other kinds of metal oxide, and that TiO
2
is not suited, in view of such characteristic, for use in forming the High-K gate insulating film.
As explained above, although there have been many attempts to control the SiO
2
interface layer in the conventional methods of forming the High-K gate insulating film, the effect of suppressing the formation of the SiO
2
layer is insufficient in principle. Even if the conventional method is successful in suppressing the formation of the SiO
2
interface layer, it has been very difficult to avoid the side effects including the deterioration of electric properties of the resultant de
Koyama Masato
Nishiyama Akira
Kabushiki Kaisha Toshiba
Novacek Christy
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Zarabian Amir
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