Electricity: electrical systems and devices – Safety and protection of systems and devices – Circuit interruption by thermal sensing
Reexamination Certificate
2000-04-28
2001-09-04
Leja, Ronald W. (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Circuit interruption by thermal sensing
Reexamination Certificate
active
06285540
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of forming a fuse in a semiconductor device and a semiconductor device which includes a fuse. In particular, the present invention relates to a method of forming a fuse in a semiconductor device which can prevent over-etching during a process of forming a fuse and can provide a good quality electrical characteristic.
2. Description of the Prior Art
In the process of forming more than two multi-layered metal conductors, such as address or data lines in SRAM memory cells, when a defect occurs in one or more bits of a SRAM cell, a repair process is performed which replaces the defective cells with excess or redundant cells. To accomplish this, the lines, such as address and data lines, of major or primary cells are connected to their counterparts in redundant cells by conductors which include fuses. The fuses can be selectively activated such as by laser to interrupt the continuity of the conductor and therefore disconnect the redundant cell from the primary cell. The repair process involves activating the fuses in the lines which connect redundant cells to functional primary cells. As a result of the repair process, only the fuse metal lines which connect the lines of the primary cells in which defects occurred to the lines of the redundant cells are left intact, and the remaining fuse lines are removed. Thus, the repair process prevents a malfunctional, thereby recovering overall performance of the chip.
In
FIG. 1
, there is shown a plan view of metal conductors in a semiconductor device with which a conventional multi-layered conductor structure is provided, and in
FIG. 2A
, there is shown a sectional view taken along the line A-A′ in FIG.
1
. The plan view of
FIG. 1
shows a pattern of the metal conductors
30
, typically made of aluminum, in which after the conductors
30
are formed, a fuse metal pattern
40
is formed by etching a barrier metal layer
25
, typically made of TiN, which was deposited before the metal layer from which the conductors
30
are formed. After the etching, the portion
40
of the metal between the conductors
30
forms a fuse
40
which can be activated by laser cutting to break the connection between the conductors
30
. The structure of
FIG. 2A
includes an insulating layer
1
on a semiconductor device on which are formed underlying metal conductor layers
10
, an interlayer insulating film
15
, via metal layers
20
connecting the underlying conductor layer
10
and conductors
30
, and insulating film
35
which can be made of an oxide.
FIGS. 2B-2F
illustrate the process of forming the device shown in
FIGS. 1 and 2A
.
FIG. 2B
illustrates the TiN barrier layer
25
formed on top of the interlayer insulating film
15
. In the next step, as shown in
FIG. 2C
, the layer
30
from which the top conductors
30
will eventually be formed is deposited on top of the barrier layer
25
. In one embodiment, the conductor layer
30
is formed of aluminum. The barrier layer
25
and conductor layer
30
are formed over via holes filled with via contact metal
20
such that the upper conductor layer
30
is in electrical contact with the lower conductor layer
10
.
In the next step, as shown in
FIG. 2C
, a photoresist mask
31
is formed over the conductor layer
30
. Next, a dry etching process is performed to form the conductor pattern
30
. The dry etching removes both the aluminum layer
30
and the underlying TiN barrier layer
25
in selected regions. For example, as shown in
FIG. 2D
, the dry etching process leaves the pattern of conductors
30
and barrier layer
25
on the insulating layer
15
separated by gaps or channels
41
.
As illustrated in
FIG. 2D
, the gaps
41
separate portions
30
B of the conductor layer
30
from the portion
30
A of the conductor. Next, as shown in
FIG. 2E
, an oxide layer
35
is formed over the conductor layer
30
. Next, a second photoresist mask
37
is formed over the oxide layer
35
such that an opening in the mask
39
provides access to the conductor
30
A. The opening
39
is positioned over the barrier layer
25
to define the position of the fuse portion
40
of the barrier layer
25
.
Next, both a dry and highly selective wet etching process are performed to remove the oxide
35
and the conductive aluminum layer
30
A in the opening
39
. The dry etching step is used to remove the oxide layer
35
and much of the aluminum
30
. Because the dry etching process tends to be difficult to control and therefore can easily overetch, the dry etch is stopped before it reaches the bottom of the aluminum conductor
30
A. Then, a highly selective wet etching process, which removes only aluminum and leaves TiN intact, is used to remove the remainder of the aluminum in the conductor
30
A. The selective wet etching is used to prevent any over-etching into the barrier layer
25
since any such over-etching would damage the fuse portion
40
and render it ineffective for use as a fuse. As shown in
FIG. 2F
, the remaining conductors are connected by the remaining fuse portion
40
of the barrier layer
25
.
Hence, the process of forming devices illustrated in FIGS.
1
and
2
A-
2
F can be time consuming, inefficient, and, therefore, expensive due to the need for special etching steps to protect the fuse material. Also, because the resulting device is located at the top layer, both the fuse layer
40
and the sides of the conductors
30
are vulnerable to external damages and undesirable contact with foreign matter.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve the problems in the prior art and to provide a method of forming a fuse in a semiconductor device which makes it possible to form a fuse metal layer having a good conductivity characteristic, by forming a fuse using a planarization process and forming a via metal layer that connects a conductor layer and another conductor layer underlying it.
In order to achieve the above object, a method of forming a fuse of a semiconductor device according to the present invention comprises the steps of forming an underlying metal conductor on a semiconductor substrate; forming an insulating film on the upper portion of said underlying metal conductor; selectively etching a first region of said insulating film to form a via contact region exposing said underlying metal conductor; selectively etching a second region of said insulating film; and burying metal within the second etched region of said insulating film and said via contact region to respectively form a fuse metal pattern and a via contact metal layer.
REFERENCES:
patent: 5472901 (1995-12-01), Kapoor
Ahn Jong-hyon
Lee Dong-Hun
Leja Ronald W.
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
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