Semiconductor device for reference voltage

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

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365226, 327543, G11C 700

Patent

active

058256954

ABSTRACT:
There is provided a semiconductor device for a reference voltage which has flat temperature characteristics and which generates a low reference voltage. A depression type MOS transistor 101 and an enhancement type MOS transistor 102 are each connected in series. A high voltage supply terminal 103 is provided at the drain of the depression type MOS transistor. A low voltage supply terminal 104 is provided at the source of the enhancement type MOS transistors. The gate of the depression type MOS transistor is connected to the low voltage supply terminal 104. The gate and drain of the enhancement type MOS transistor are connected. An output terminal 105 is provided at a point where both MOS transistors are connected. This provides flat temperature characteristics and allows the generation of a low reference voltage.

REFERENCES:
patent: 5283762 (1994-02-01), Fujishima
patent: 5339272 (1994-08-01), Tedrow et al.
patent: 5453953 (1995-09-01), Dhong et al.
patent: 5461591 (1995-10-01), Kim et al.

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