Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-03-20
2004-12-14
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06830980
ABSTRACT:
FIELD OF INVENTION
The present invention relates generally to semiconductor devices and more particularly to manufacturing semiconductor devices using carbon-containing regions formed in a wafer.
BACKGROUND OF THE INVENTION
MOS and other types of transistors are found in many modern semiconductor products where switching and/or amplification functions are needed. Many manufacturing processes and techniques have been developed for forming MOS transistors and other electrical components in semiconductor substrate materials such as silicon and the like to produce semiconductor devices. In recent years, the size of transistors and other components have steadily decreased to submicron levels in order to facilitate higher device densities in semiconductor products. At the same time, many applications of such devices have created a need to operate the semiconductor devices at higher speeds and lower power and voltage levels.
In fabricating transistor devices, various regions of semiconductor material are selectively doped with impurities to create ‘p-type’ or ‘n-type’ regions, such as wells, source/drain regions, lightly-doped drain (LDD) regions, pocket or halo regions, etc., where the type (e.g., ‘p’ or ‘n’) depends upon the dopants employed. P-type regions are typically created using dopants such as boron, indium or others, whereas n-type regions are created using phosphorus, arsenic, antimony, etc. Such doping is generally accomplished through dopant diffusion techniques and/or through implantation processes, whereby dopants of a desired concentration are ideally provided to specific regions or areas of a semiconductor body. This selective doping allows semiconductor devices, such as transistors to be fabricated in a controlled and repeatable fashion to achieve desired operating performance specifications.
However, dopants tend to relocate through thermal diffusion in a semiconductor material, causing difficulties in the manufacture of semiconductor devices, and potentially degrading device performance. For instance, dopant out-diffusion from shallow junction extension and pocket or halo implanted regions of MOS transistors during thermal processing can degrade the achievable transistor drive current capability by reducing mobility in the channel region underlying the transistor gate. Accordingly, the locations and concentrations of such dopants may be tailored according to the thermal processing that a semiconductor wafer experiences after the dopants are introduced. In this manner, desired dopant location and concentrations can be achieved when the fabrication process is completed. However, the ability to control exact concentrations and locations of dopants is made more difficult by the tendency of dopants to diffuse during thermal manufacturing processing steps.
In order to inhibit the diffusion of dopants in a semiconductor body, diffusion barriers or regions of diffusion inhibiting materials may be formed in certain regions of the semiconductor material. For instance, carbon-containing regions may be formed for inhibiting or mitigating dopant diffusion, such as layers of carbon-containing epitaxial silicon or regions of a semiconductor body implanted with carbon-containing species. However, the effectiveness of the carbon-containing region with respect to inhibiting dopant diffusion is dependent upon the location and concentration of carbon. Moreover, the presence of carbon in certain regions or locations of a semiconductor body may adversely affect device performance or the ability to process a wafer during manufacturing. In this regard, the accumulation of carbon at or near the surface of a wafer tends to reduce the oxidation rate, leading to higher overall manufacturing thermal budget required to achieve a desired oxide thickness, including oxidation process steps used in forming a gate dielectric. Accordingly, there is a need for improved methods and techniques for semiconductor device fabrication, by which carbon-doped regions can be successfully employed to control dopant diffusion during the manufacture of semiconductor devices.
SUMMARY OF THE INVENTION
The following presents a simplified summary in order to provide a basic understanding of one or more aspects of the invention. This summary is not an extensive overview of the invention, and is neither intended to identify key or critical elements of the invention, nor to delineate the scope thereof. The invention relates to semiconductor device fabrication methods in which a carbon-containing region is formed in a wafer to inhibit or mitigate diffusion of dopants during fabrication.
The inventors have appreciated that the provision of carbon or carbon-containing species to a region of a semiconductor body (e.g., through implantation or other techniques) generally results in both substitutional carbon and interstitial carbon, where interstitial carbon in particular tends to out-diffuse from its original location during thermal processing. As discussed above, the out-diffusion/deactivation of carbon reduces the ability to inhibit thermal out-diffusion of dopants (e.g., boron, phosphorus, or others) during the manufacturing process. In addition, the carbon out-diffusion or deactivation may lead to subsequent generation of surface defects, reduced oxidation rates, or otherwise adversely impact operations affecting the wafer surface.
In the present invention, front-end thermal processing operations, including oxidation and/or anneal processes, are performed at high temperatures for short durations in order to mitigate out-diffusion of carbon from the carbon-containing region, such that carbon remains to inhibit or reduce dopant diffusion. The invention may be employed to provide increased control of dopant location and concentration to thereby facilitate control and repeatability of semiconductor device performance. In addition, the invention may be used to prevent or mitigate diffusion of carbon to the surface of a wafer, and thus to facilitate expeditious oxidation rates during manufacturing.
In one aspect of the invention, a method of fabricating a semiconductor device is provided, comprising forming a carbon-containing region in the wafer, and performing at least one front-end oxidation or anneal process using a high temperature, short duration thermal process to mitigate out-diffusion of carbon from the carbon-containing region during front-end fabrication processing. The carbon-containing region may be formed by any technique, including but not limited to implanting carbon or a carbon-containing species in the wafer or growing an epitaxial carbon-containing layer over a semiconductor body, with or without an overlying epitaxial cap layer.
The short duration, high temperature oxidations may include formation of a pad oxide layer and/or a liner oxide layer during isolation processing (e.g., shallow trench isolation (STI) processing), and/or formation of a gate oxide or gate dielectric layer during front-end processing. In one implementation, the elevated temperature oxidations may be performed at temperatures of about 1000 degrees C. or more for a duration of about 60 seconds or less, at a pressure of about 10 Torr or less. The front end processing may alternatively or in combination comprise performing an anneal, such as a channel implant damage anneal process at a temperature of about 1050 degrees C. or more for a duration of about 60 seconds or less. The front-end thermal processing, moreover, may include in-situ steam generation oxidation or anneal processes. The invention thus provides for reducing the overall front-end thermal budget of a semiconductor device manufacturing process, which may be employed to inhibit carbon out-diffusion or deactivation, by which the prevention or reduction in the amount of dopant out-diffusion or relocation can be achieved.
The following description and annexed drawings set forth in detail certain illustrative aspects and implementations of the invention. These are indicative of but a few of the various ways in which the principles of the invention may be employed.
REFERENCES:
Chakravarthi Srinivasan
Chidambaram P R
Mansoori Majid Movahed
Miles Donald S.
Brady III W. James
Hoang Quoc
McLarty Peter K.
Nelms David
Telecky , Jr. Frederick J.
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