Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-12-14
2001-08-28
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S202000
Reexamination Certificate
active
06281065
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device in which a bipolar transistor and a MOS transistor are integrated on the same substrate.
2. Related Art
MOS transistors have many advantages but, on the other hand, have disadvantages such as low mutual conductance, a limited switching speed when used as an element of the integrated circuit for driving capacitive load, and limited performance as a power semiconductor device. The advantages and disadvantages of bipolar transistors are opposite to those of MOS transistors. For providing the advantages of the both, composite elements in which a bipolar transistor and a MOS transistor are integrated in a monolithic manner have been used.
A semiconductor device comprising those composite elements aims at high-speed operation of the device. For this purpose, a thick insulating film is formed under the emitter electrode in order to decrease the parasitic capacitance of the bipolar transistor and, for the MOS transistor, a thin gate insulating film is formed to provide improved performance.
For this reason, the MOS transistor having a gate insulating film typically 10 nm or less in thickness is formed, and thereafter an insulating film as thick as 50 to 200 nm is formed to integrate the bipolar transistor.
Incidentally, in the case where the gate of the MOS transistor to be formed is, for example, approximately 0.3 &mgr;m or less in length, heat treatment needs to be reduced in order to prevent diffusion of the dopant of which the source/drain is composed. On the contrary, the bipolar transistor to be formed following the MOS transistor is designed to obtain a desired current amplification factor by allowing the dopant to diffuse to a predetermined region and thus forming the emitter.
Therefore, forming the MOS transistor first would cause the performance of the bipolar transistor to be degraded because the bipolar transistor could not be formed by performing heat treatment at high temperatures for a long duration in order to ensure the characteristics of the MOS transistor. On the other hand, heat treatment performed at high temperatures for a long duration in order to ensure the performance of the bipolar transistor would degrade the performance of the MOS transistor.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device fabrication method that enables a bipolar transistor and a MOS transistor to be integrated in a monolithic manner without degrading the characteristics of the respective elements.
The semiconductor device fabrication method according to the present invention comprises the steps shown below. Initially, first and second regions defined by an element isolation region are formed on a semiconductor substrate. Then, an oxidation-resistant film is so formed on the semiconductor substrate as to allow the first region of the semiconductor substrate to be exposed. Then, a collector layer is formed on the first region. Thereafter, a silicon oxide film is selectively formed on the first region using the oxidation-resistant film as a mask. Subsequently, a base layer is formed on the first region. Then, an emitter layer disposed in the base layer region is formed. Thereafter, formed is an emitter electrode connected to the emitter layer via a contact hole formed through the silicon oxide film. Subsequently, the oxidation-resistant film is removed after a bipolar transistor comprising the collector layer, base layer, and emitter layer has been formed. Then, after the aforementioned steps have been completed, a MOS transistor is formed in the second region.
That is, the bipolar transistor is first formed with the region, where the MOS transistor is to be formed, being protected by means of an oxidation-resistant film. In addition, the regions other than the emitter contact of the emitter electrode are isolated from the surface of the semiconductor substrate by means of the silicon oxide film.
Furthermore, the oxidation-resistant film is formed of silicon nitride and formed on the semiconductor substrate via a silicon oxide film. This allows the silicon oxide film to protect the surface of the semiconductor substrate when the oxidation-resistant film is removed if such etching condition is employed as to selectively remove silicon nitride relative to silicon oxide.
Furthermore, a passivation film is so formed as to cover exposed regions on sides of and an upper surface of the emitter electrode, whereby the emitter electrode is so formed as to be electrically isolated from the surrounding.
Still furthermore, the emitter electrode is formed of polysilicon, and the passivation film is formed by thermally oxidizing the exposed surfaces of the emitter electrode. Consequently, the passivation film is formed in a self-aligning manner without depositing a new film.
REFERENCES:
patent: 4407059 (1983-10-01), Sasaki
patent: 4921811 (1990-05-01), Watanabe et al.
patent: 5028557 (1991-07-01), Tsai et al.
patent: 5079183 (1992-01-01), Maeda et al.
patent: 3-198371 (1991-08-01), None
patent: 8-8351 (1996-01-01), None
patent: 9-69580 (1997-03-01), None
McGinn & Gibb PLLC
NEC Corporation
Nelms David
Nhu David
LandOfFree
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