Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2007-11-21
2009-08-18
Ha, Nathan W (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257SE21632
Reexamination Certificate
active
07575964
ABSTRACT:
A semiconductor device employs an asymmetrical buried insulating layer, and a method of fabricating the same. The semiconductor device includes a lower semiconductor substrate. An upper silicon pattern is located on the lower semiconductor substrate. The upper silicon pattern includes a channel region, and a source region and a drain region spaced apart from each other by the channel region. A gate electrode is electrically insulated from the upper silicon pattern and intersects over the channel region. A bit line and a cell capacitor are electrically connected to the source region and the drain region, respectively. A buried insulating layer is interposed between the drain region and the lower semiconductor substrate. The buried insulating layer has an extension portion partially interposed between the channel region and the lower semiconductor substrate.
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English language translation of Korean Publication No. 2001-0045580.
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Choe Jeong-Dong
Oh Chang-Woo
Park Dong-Gun
Yeo Kyoung-Hwan
Ha Nathan W
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
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