Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
Reexamination Certificate
2011-06-28
2011-06-28
Nguyen, Cuong Q (Department: 2811)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having junction gate
C438S227000
Reexamination Certificate
active
07968393
ABSTRACT:
A semiconductor device can include at least a first diffusion region formed by doping a semiconductor substrate and at least a second diffusion region formed by doping the semiconductor substrate that is separated from the first diffusion region by an isolation region. At least a first conductive line can comprise a semiconductor material formed over and in contact with the first diffusion region and the second diffusion region. A portion of the first conductive line in contact with the first diffusion region is doped to an opposite conductivity type as the first diffusion region. At least a second conductive line comprising a semiconductor material is formed in parallel with the first conductive line and over and in contact with the first diffusion region and the second diffusion region. A portion of the second conductive line can be in contact with the first diffusion region and doped to a same conductivity type as the first diffusion region. A portion of the second conductive line in contact with the second diffusion region can be doped to a same conductivity type as the second diffusion region.
REFERENCES:
patent: 3412286 (1968-11-01), Grebene
patent: 4228367 (1980-10-01), Brown
patent: 4333224 (1982-06-01), Buchanan
patent: 5618688 (1997-04-01), Reuss
patent: 5773891 (1998-06-01), Delgado
patent: 7598133 (2009-10-01), Moniwa et al.
patent: 2002/0197779 (2002-12-01), Evans
patent: 2007/0096144 (2007-05-01), Kapoor
patent: 2007/0262793 (2007-11-01), Kapoor
patent: 2008/0099873 (2008-05-01), Vora
patent: 2208967 (1989-04-01), None
patent: 60258948 (1985-12-01), None
U.S. Appl. No. 11/590,265, Vora, Madhukar.
Haverstock & Owens LLP
Nguyen Cuong Q
SuVolta, Inc.
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