Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-03-29
2011-03-29
Kerveros, James C (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S030000
Reexamination Certificate
active
07917818
ABSTRACT:
A semiconductor device includes a volatile memory for storing a first instruction group, a first processing unit for executing the first instruction group, a nonvolatile memory for storing a second instruction group, a second processing unit for executing a second instruction group, a control signal output unit for outputting a control signal to specify permission or prohibition of executing a debugging function to the first processing unit, and a debug control unit for controlling execution of the debugging function by the first processing unit based on the control signal.
REFERENCES:
patent: 5625785 (1997-04-01), Miura et al.
patent: 6553506 (2003-04-01), Hijikata et al.
patent: 6954878 (2005-10-01), Kudo
patent: 7185244 (2007-02-01), Kojima et al.
patent: 7401257 (2008-07-01), Usui
patent: 7437623 (2008-10-01), Larson et al.
patent: 7584381 (2009-09-01), Kudo
patent: 2003-186693 (2003-07-01), None
Kerveros James C
McGinn IP Law Group PLLC
Renesas Electronics Corporation
LandOfFree
Semiconductor device controlling debug operation of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device controlling debug operation of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device controlling debug operation of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2643757