Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2006-11-21
2006-11-21
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C710S029000, C710S112000, C711S147000, C711S150000
Reexamination Certificate
active
07139881
ABSTRACT:
A structure and associated method of transfer data on a semiconductor device, comprising: a plurality of systems within the semiconductor device. Each system comprises at least one processing device and a local memory structure. Each processing device is electrically coupled to each local memory structure within each system. Each local memory structure is electrically coupled to each of the other said local memory structures. Each local memory structure is adapted to share address space with each of the processing devices. Each processing device is adapted to transmit data and instructions to each local memory structure.
REFERENCES:
patent: 6457100 (2002-09-01), Ignatowski et al.
patent: 2002/0054519 (2002-05-01), Murai et al.
patent: 2002/0156989 (2002-10-01), Gaertner et al.
patent: 2004/0039880 (2004-02-01), Pentkovski et al.
Andrew S. Tanenbaum, Distributed Operating Systems, 1995, Prentice-Hall, pp. 298-301.
Goodnow Kenneth J.
Kampf Francis A.
Norman Jason M.
Ventrone Sebastian T.
Canaile Anthony
International Business Machines - Corporation
Peikari B. James
Schmeiser Olsen & Watts
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