Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-06-29
2003-12-02
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S756000, C438S792000
Reexamination Certificate
active
06656804
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to a semiconductor device and a production method thereof, and particularly to a MOS semiconductor device which enables reduction in gate leakage currents with a thinner gate dielectric film, and a production method thereof.
(2) Description of the Prior Art
As a material for gate insulator used in semiconductor devices which use MOS devices, silicon oxide has always been used when the gate dielectric film thickness (equivalent oxide thickness) as calculated based on oxide silicon permittivity is 3 nm or more.
However, as the effort to use a thinner gate dielectric film for higher speed has been accelerated, it has been found that, when its equivalent oxide thickness is 3 nm or less, direct-tunneling leakage current flowing through the dielectric film becomes considerable, resulting in an increase in gate leakage currents which is not negligible from the viewpoint of decreasing power consumption.
To solve this problem, there have been many attempts to reduce such direct tunneling leakage currents by increasing the physical thickness while maintaining the equivalent oxide thickness constant.
For instance, it has been reported on page 106 of IEEE Electron Device Letters Vol. 19 published in 1998 that a gate dielectric film which has a silicon nitride film formed on a thermally oxidized film formed on a silicon substrate or directly on a silicon substrate demonstrates reduced gate leakage currents when compared to oxide silicon film. However, the above-said report also discloses that it is necessary to perform annealing in an oxidizing atmosphere after formation of a silicon nitride film for reduction in leakage currents.
Usually, silicon nitride films are produced by chemical vapor deposition (CVD). It is known that in the silicon nitride film making process, the film contains much hydrogen and a bond of nitrogen and hydrogen serves as a charge trap. Therefore, it has been thought that although direct-tunneling leakage current can be reduced, the current through this charge trap is considerable, which thereby prevents leakage current reduction.
For this reason, it is a very important technique for gate leakage current reduction to decrease the charge trap in the silicon nitride by decreasing the amount of hydrogen in the film by annealing in an oxidizing atmosphere and, at the same time, adding oxygen.
SUMMARY OF THE INVENTION
When a silicon nitride film is formed and then annealed in an oxidizing atmosphere, the charge trap in the silicon nitride decreases and also the surface of the silicon nitride is oxidized, generating a thin silicon oxide film. According to an examination by the inventor, it has been demonstrated that, depending on the annealing condition in the oxidizing atmosphere, if this annealing step is carried out under a condition effective for gate leakage current reduction, a silicon oxide film with a thickness of 0.5 nm or more is formed on the surface of the nitride film. In an area where the equivalent oxide thickness of the gate dielectric film is 3 nm or less, the above-said silicon oxide film formed on the silicon nitride film surface will be a serious barrier to a thinner gate dielectric film.
In view of the above circumstances, the present invention has an object to provide an improved MOS semiconductor device which permits gate leakage current reduction and the use of a thinner gate dielectric film, and a production method thereof.
The semiconductor device which achieves the above object according to the present invention comprises a gate electrode provided through a gate dielectric film on a semiconductor substrate of the first conductive type, and a source and a drain region of the second conductive type which are separated from each other in the semiconductor substrate, wherein the above-said gate dielectric film has an equivalent oxide thickness of 3 nm or less taking the factor of permittivity into consideration, and consists of a dielectric film composed of silicon, nitrogen and oxygen as main constituent elements and also wherein the nitrogen concentration is higher than the oxygen concentration in the region of the gate dielectric film at depths of 0.15 nm to 0.5 nm from the interface with the gate electrode.
The production method for obtaining this semiconductor device is characterized in that some portion of the gate dielectric film making process is composed of the following steps: a step of making a dielectric film whose main constituent elements are silicon and nitrogen; a step of annealing this in an oxidizing atmosphere; and a step of selectively removing the silicon oxide film formed on this dielectric film surface by exposure to a liquid which dissolves the silicon oxide.
This makes it possible to form a gate dielectric film having silicon nitride on the surface of which there is no silicon oxide film with a low permittivity, thereby permitting both a decrease in gate dielectric film thickness (equivalent oxide thickness) and reduction in gate leakage currents.
The silicon oxide film as referred to herein is defined as a silicon oxide film in which the oxygen concentration is higher than the nitrogen concentration in the silicon oxide; the above-mentioned silicon nitride film silicon on the surface of which there is no silicon oxide film with a low permittivity refers to a silicon nitride film in which the nitrogen concentration is higher than the oxygen concentration.
The foregoing and other objects, advantages, manner of operation and novel features of the present invention will be understood from the following detailed description when read in connection with the accompanying drawings.
REFERENCES:
patent: 6150286 (2000-11-01), Sun et al.
C. G. Parker et al.,IEEE Electron Device Letters, “Ultrathin Oxide-Nitride Gate Dielectric MOSFET's,” 1998, pp. 106-108.
Mine Toshiyuki
Tsujikawa Shimpei
Ushiyama Masahiro
Yugami Jiro
Ghyka Alexander
Miles & Stockbridge P.C.
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