Semiconductor device and process of fabricating same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S306000, C438S309000, C438S199000, C438S200000, C438S586000, C438S592000, C438S682000, C257S408000, C257S344000, C257S335000

Reexamination Certificate

active

10760463

ABSTRACT:
A semiconductor device is provided with a FET having a sufficiently small short channel effect and sufficiently small junction capacitance and junction leakage current. The FET includes a channel region formed in a silicon substrate, a gate electrode formed on the channel region through the intermediary of a gate insulting film, heavily doped regions, and pocket regions. The pocket regions are formed to extend from inside the heavily doped regions, respectively, over inside the channel region. Because a pocket sub-region inside the respective heavily doped regions is formed to be located in regions shallower than the respective lower end faces of the heavily doped regions, junction capacitance and junction leakage current are reduced. Further, because respective pocket sub-regions inside the channel region are formed in regions deeper than the respective pocket sub-regions inside the heavily doped regions, a short channel effect can be reduced.

REFERENCES:
patent: 5489791 (1996-02-01), Arima et al.
patent: 5945710 (1999-08-01), Oda et al.
patent: 6245603 (2001-06-01), Shinohara
patent: 6696729 (2004-02-01), Adachi
patent: 10-189951 (1998-07-01), None
patent: 2000-232075 (2000-08-01), None
patent: 2003-017578 (2003-01-01), None

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