Semiconductor device and process for manufacturing same

Details Semiconductor device and process for manufacturing same Semiconductor device and process for manufacturing same

2002-03-13

2003-12-09

Cao, Phat X. (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S525000, C438S532000

Reexamination Certificate

active

06660586

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a gate oxide film, such as a transistor, and to a process for manufacturing a semiconductor device.
2. Description of the Background Art
Conventionally, a process for manufacturing a semiconductor device having a gate oxide film, such as a transistor, includes the step of forming a gate electrode. The steps up to the point of the preparation of a material to be a gate electrode on a substrate are described in reference to
FIG. 14. A
gate oxide film
3
is formed on the main surface of a semiconductor substrate
1
, such as a silicon wafer. Next, a separation oxide film
2
is formed through thermal oxidation, or the like. Furthermore, a polysilicon (polycrystal silicon) layer
4
is layered so as to cover the top surface of this substrate.
FIG. 14
shows the condition wherein the above steps up to this point have been completed. Here, only the formation of polysilicon layer
4
without any impurities mixed in fails to provide sufficient conductivity for allowing the functions as a gate electrode. In order to enhance the conductivity of polysilicon layer
4
, it is desirable to make polysilicon layer
4
be a polysilicon layer which includes predetermined impurities.
There are several methods for making polysilicon layer
4
be a polysilicon layer
4
including predetermined impurities.
First, there is a method wherein polysilicon layer
4
becomes a doped polysilicon layer
4
a,
that is to say, a method for forming the layer under the condition where impurities are added in advance. Concretely, at the time of silicon deposition by means of a CVD (chemical vapor deposition) method, for example, a gas mixture where PH
3
is added to SiH
4
is used. In this manner, doped polysilicon layer
4
a,
which includes phosphorous as an impurity, can be initially formed. This is advantageous in the point that the number of steps can be reduced because it is not necessary to inject phosphorous as an impurity in a subsequent process.
The initial formation of doped polysilicon layer
4
a,
however, already includes large crystal grains. Accordingly, at the time of heating in the subsequent heat treatment steps for allowing the impurity distribution to be uniform, the silicon crystal grains grow remarkably so that the crystal grains become much larger. As a result, as shown in
FIG. 15
, at the time when etching is carried out by using a resist
5
as a mask in order to form the gate electrode into a desired structure, there is the disadvantage wherein separation of crystal grains occurs among crystal grains so that the surface formation of the sidewalls of the gate electrode becomes significantly deteriorated as shown in FIG.
16
. In addition, the degree of occurrence of this separation varies depending on individual cells and this causes the problem of the dispersion of the characteristics of the cells when the product is completed.
There is another method where an impurity such as phosphorous is injected by means of an ion injection apparatus after first forming polysilicon layer
4
in the form of an undoped polysilicon layer which does not include impurities. In this case, the layer is formed in the condition wherein the crystal grains are small in comparison with the case of a doped polysilicon layer and, therefore, crystal grain growth can also be controlled at the time of subsequent heating. In the case of this method, however, impurity ions which have passed through the border between crystals, in pillar form, in polysilicon layer
4
reach to gate oxide film
3
as shown in
FIG. 17
at the time of impurity injection and, thereby, in some cases, a defect
6
is caused in gate oxide film
3
or the impurity ions further penetrate to the lower side of gate oxide film
3
so as to enter the inside of the semiconductor substrate
1
. As a result, the gained semiconductor device has a structure wherein defect
6
occurs in gate oxide film
3
, as shown in FIG.
18
. In this structure impurities are also included in the semiconductor substrate
1
beneath gate oxide film
3
. This causes a problem wherein threshold voltage of cells is lowered or wherein a “punch through phenomenon” in which a leak current flows even in the case no voltage at all is applied to the gate electrode occurs.
Therefore, a purpose of the present invention is to provide a semiconductor device and a process for the same wherein no problems such as the separation of crystal grains, the defective formation of the gate oxide film or the invasion of impurities into the semiconductor substrate occur.
SUMMARY OF THE INVENTION
In order to achieve the above described purpose, a semiconductor device according to the present invention is provided with a semiconductor substrate, a plurality of separation oxide films formed in stripes parallel to each other in a first direction on the main surface of the above substrate, gate oxide films formed in regions placed between the above separation oxide films on the above main surface and gate electrodes formed so as to extend from areas on the above gate oxide films to areas on the above separation oxide films on both sides of the above gate oxide films, wherein the distribution of the impurity diffused inside of the above gate electrodes is such that the impurity concentration is high on both sides and is low in the middle when the distribution is displayed by scanning in the direction perpendicular to the above first direction in an arbitrary plane parallel to the above main surface across the above gate electrodes. By adopting this configuration, the semiconductor device can be manufactured by means of a method wherein an impurity is injected from the sidewalls on both sides in the width direction of the gate electrodes before being diffused to the center through heat treatment and there is no risk of defect occurrence in the gate oxide films or of invasion of an impurity into the lower sides of the gate oxide films.
In the above described invention, the above impurity is preferably phosphorous. By adopting this structure, a semiconductor device having gate electrodes in which an impurity is uniformly diffused because phosphorous is easily diffused as an n-type impurity.
In order to achieve the above described purpose, a process for a semiconductor device according to the present invention includes the injection step of injecting an impurity to a semiconductor substrate structure having, on its main surface, a plurality of separation oxide films formed in stripes parallel to each other in a first direction and gate oxide films formed in regions placed between the above separation oxide films and having pieces of polysilicon layer formed so as to extend from areas on the above gate oxide films to areas on portions of the above separation oxide film as well as a first resist which covers the top surface of the polysilicon layer so that the impurity is injected into the above polysilicon layer located above the above separation oxide films and the heat diffusion step wherein a heat treatment is carried out so that the above impurity injected in the above injection step diffuses to regions located above the above gate oxide films within the above polysilicon layer. By adopting this method an impurity injection can be carried out to the polysilicon layer only above the separation oxide films, which are at a distance away from the gate oxide films, while the areas above the gate oxide films are protected by the resist and, therefore, even in the case that the impurity penetrates through the polysilicon layer, it only strikes the top surfaces of the separation oxide films and the injected impurity can be prevented from directly reaching to the gate oxide films and from invading into the semiconductor substrate beneath the gate oxide films.
In the above described invention, the above polysilicon layer preferably has sidewalls above the above separation oxide films and the above first resist covers the top surfaces of the above polysilicon layer in the same ranges as

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