Semiconductor device and power converter using the same

Active solid-state devices (e.g. – transistors – solid-state diode – With means to increase breakdown voltage threshold – Field relief electrode

Reexamination Certificate

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C257S488000, C257S492000

Reexamination Certificate

active

06566726

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a termination construction of a semiconductor device.
As a method for realizing a high performance power semiconductor element, attempts have been made to make a drift layer which is higher in concentration and thinner than Si by using silicon carbide (hereunder, referred to as SiC) which has a large electron avalanche breakdown electric field, to lower the electric resistance and to reduce power loss occurring under the conducting-state and at the time of switching.
In a planar type semiconductor element, such as a power MOSFET, which emits lines of electric force under a non-conducting-state, not from not an end, but from a surface, a termination region is formed on a surface of a drift layer of low impurity concentration. The electric intensity on the surface, in the case of an n-type power MOSFET, becomes maximum at a boundary between a p-base formed at the outer most side of an active region and an n-drift layer in a termination region, decreases toward a peripheral portion of the element in the termination region, and at the same time, also decreases toward the inside of the p-base.
On the surfaces of the termination and p-base in contact therewith, in general, a passivation layer film is formed of an oxide material. In the oxide film, when the field intensity exceeds several MeV/cm, the frequency of dielectric breakdown increases. At a high temperature, even when the field intensity is 2 MeV/cm or less, the probability of occurrence of dielectric breakdown is larger than 1%, and so it becomes impossible to ignore it. On the other hand, the field intensity of SiC to the dielectric breakdown thereof is 2.2 MeV/cm, and the impurity concentration of a drift layer is designed so that the electric intensity at the boundary between a p-well inside the element and a n-drift layer exceeds the value. It is the same even at a junction interface between the above-mentioned termination and the p-well, and so a ratio of occurrence of breakdown can not be ignored. Therefore, as disclosed in “International Conference of Silicon Carbide, III-Nitrides and Related Materials 1997, page 136”, as a termination structure, attempts have been made to employ a structure called JTE (Junction Termination Extension).
FIG. 2
is a typical sectional view a JTE, in an example of a P
+

diode. In
FIG. 2
,
11
denotes a high concentration n
+
substrate,
12
denotes a low concentration (high resistance) n

epitaxial layer,
31
denotes a cathode electrode,
32
denotes an anode electrode,
21
denotes a P
+
layer and an anode region in the diode. The concentration of the n

layer is selected a maximum value at which a prescribed breakdown voltage is obtained. The present example is characterized in that band-like p-type regions
22
and
23
successively reduced in concentration are formed adjacent to and on the outside of the anode p
+
21
. On the surface, the highest field intensity is at a junction interface between the p-type region
23
and a n-termination region. An attempt is made to make the extension of a depletion layer into a p-type region large by lowering the concentration of the p-type region in contact with the junction interface, reducing the field intensity on the surface and reducing the percentage of occurrence of the dielectric breakdown.
SUMMARY OF THE INVENTION
In order to reduce the field intensity at a P
+

junction to a great extent, it is sufficient to lower the concentration of the p-layer to about the same degree as the concentration of the n-layer. However, considering variation in manufacturing, a lower limit of the concentration of the p-region
23
is about twice as high as the concentration of the n-layer. A field intensity reduction effect obtained by reducing the concentration of the p-type region to this degree, in the case where the expansion of the depletion layer at the P
+

junction is simulated to be only an n-side, is (⅔)
½
at most by Poisson's equation, and is reduced only to 80%. That is, there is a field intensity of about 1.6 MeV/cm. The electric field is reduced because an effect of releasing an electric field onto the surface is added to the effect, however, it is difficult to reduce the electric field to lower than 1 MeV/cm, at which the frequency of dielectric breakdown can be ignored.
An object of the present invention is to provide a structure in which the field intensity on a termination surface can be effectively reduced to about 1 MeV/cm or less and, desirably, to about an interface of Si/SiO
2
in order to cause dielectric breakdown even at a high temperature, even if a semiconductor such as SiC which is larger in electron avalanche breakdown field than Si is used.
A second object of the present invention is to provide a structure which is able to reduce the electric intensity, almost not affecting an on-characteristic.
In order to solve the above problem, in accordance with the present invention, in a P
+

diode and a n-channel transistor, a drift layer is made into two layers comprising an n

layer of lower concentration and higher resistance in addition to a conventional n-layer, and a termination region is formed on the surface of the n

layer.
In accordance with the present invention, an impurity concentration ratio of the n

layer and the n-layer is less than 1:2. Alternatively, a resistance ratio of the n

layer and the n-layer is 2:1 or larger.
Further, in order to achieve the second object, in accordance with the present invention, the thickness of the n

layer is made thinner to be less than that of the n-layer. Further, in accordance with the present invention, a structure is adopted in which there is no above-mentioned n

layer in the drift region or channel region. For example, in a diode, the n

layer O is made shallower than a high concentration p-layer. In a transistor, the n

layer is made thinner than the thickness of a source n
+
layer, and further, the n

layer is made shallower than a p-type region in contact with the termination region, and the n

layer is provided only in the termination region.
Since the n

layer of lower concentration than the n-layer is provided on the surface side, the width of a depletion layer of an n-side on the surface becomes long, and so it is possible to suppress the field intensity of the surface to less than 1 MeV/cm even if the maximum field intensity inside the element is 2 MeV/cm.
Further, by making the impurity concentration ratio between the n

layer and the n-layer less than 1:2, and by extending the width of the depletion layer on the n-side to be twice or more, the field intensity of the surface can be reduced to less than 1 MeV/cm, further to about the same degree as the interface of Si/SiO
2
. The above-mentioned impurity concentration ratio corresponding to that of the resistance ratio is larger than 2:1 on the contrary.
On the other hand, since the n

layer is larger in resistance than the n-layer, the n

layer in the drift region or channel region increases in on-resistance, which invites a worsening of the characteristics. In accordance with the present invention, by making the n

layer thinner than the n-layer, it is possible to prevent the characteristics from being degraded. Further, in a transistor, by making the n

layer thinner than the source n
+
and shallower than the p-type region contacting the termination, and, in a diode, by making it shallower than the high concentration p
+
layer, a structure in which the n

layer does not substantially exist in the channel or drift region results, and it is possible to nullify any degradation of the characteristics.
Further, even if each semiconducting layer is reversed in conductive type, that is, even if a p-type is replaced by a n-type layer and a n-type layer is replaced by a p-type layer, the same operation and effect are achieved.


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