Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2008-01-24
2009-12-29
Le, Vu A (Department: 2824)
Static information storage and retrieval
Read/write circuit
Testing
C365S230030
Reexamination Certificate
active
07639554
ABSTRACT:
A semiconductor device includes: a first memory; and a second memory. The first memory includes: a first memory cell array configured to be divided into a plurality of sectors, an erasure time setting register configured to hold a sector erasure assurance time to assure an erasure time for erasing data stored in one sector, and a first control circuit configured to execute a sector erasure test in which data stored in at least one selected sector selected from the plurality of sectors are erased within the sector erasure assurance time. The second memory includes: a second memory cell array configured to have a data storage system different from that of the first memory cell array, and a second control circuit configured to execute a data hold test with respect to the second memory cell array while the sector erasure test is executed.
REFERENCES:
patent: 2003/0156473 (2003-08-01), Sinclair et al.
patent: 7-13954 (1995-01-01), None
patent: 2001-67895 (2001-03-01), None
patent: 2002-304898 (2002-10-01), None
patent: 2003-346499 (2003-12-01), None
Hashimoto Kiyokazu
Tsunesada Nobutoshi
Le Vu A
NEC Electronics Corporation
Sughrue & Mion, PLLC
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