Semiconductor device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257298, 257306, 257329, 257401, H01L 2972

Patent

active

061506885

ABSTRACT:
A first impurity diffusion layer forms one of source/drain regions and also forms a bit line. A first semiconductor layer, a channel semiconductor layer and a second semiconductor layer, which forms the other of source/drain regions and also forms a storage node, are disposed on the first impurity diffusion layer. A capacitor insulating film is disposed on a second conductive layer. A cell plate is disposed on a storage node with the capacitor insulating film therebetween. A capacitance of the bit line is reduced, and a dynamic random access memory thus constructed performs a high-speed operation.

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"A Surrounding Gate Transistor (SGT) Cell for 64/256 MBIT DRAMS", K. Sunouchi et al., IEDM 89-23, pp. 23-26, 1989.

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