Semiconductor device and method of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S240000, C438S396000, C438S397000, C438S254000

Reexamination Certificate

active

06489198

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device with a capacitor using tungsten nitride as a material to form an electrode, and a method of manufacturing the same.
In a dynamic random access memory (DRAM) comprised of one transistor and one capacitor, along with an increase in integration degree of the integrated circuit, it is required to increase the memory capacity by reducing the memory cell area. In this requirement, a technique has been proposed which increases the substantial area by forming a capacitor with a cylindrical or multilayered electrode structure, so that the memory capacity is increased without increasing the memory cell size.
For example, when a cylindrical capacitor structure is to be employed, a plate electrode which forms a capacitor is formed on a capacitor film having a large step. A conductor layer serving as the plate electrode to be formed on the capacitor film must be formed continuously including a step portion produced by the thickness portion of the capacitor film. Tungsten nitride, titanium nitride, ruthenium, or the like that can be formed with a good step coverage is used as the material of the conductor film, because these conductive materials can form a film by chemical vapor deposition (CVD) having a good step coverage. Among these conductive materials, tungsten nitride is superior in terms of adhesion properties and easiness to be processed to the electrode, and low leakage. Tungsten nitride is less expensive and easier to be processed to the electrode than ruthenium. Also, tungsten nitride can form a film with less damaging to an underlying capacitor film than titanium nitride.
A DRAM using above tungsten nitride will be described.
As shown in
FIG. 3
, a gate electrode
704
is formed on that region on a semiconductor substrate
701
, which is defined by an isolation region
702
through a gate insulating film
703
. Impurity regions are formed in the semiconductor substrate
701
on the two sides of the gate electrode
704
by ion implantation or the like using the gate electride
704
as a mask, thereby forming source/drain regions
705
.
An interlevel insulating film
706
is formed on the gate electrode
704
over the entire surface of the semiconductor substrate
701
. A contact plug
707
to be connected to the corresponding source/drain region
705
formed in the semiconductor substrate
701
is formed at a predetermined position of the interlevel insulating film
706
. A bit line
708
is formed to be connected to the contact plug
707
.
An interlevel insulating film
709
is formed on the interlevel insulating film
706
including the bit line
708
. A contact plug
710
to be connected to the corresponding source/drain region
705
formed in the semiconductor substrate
701
is formed to extend through the interlevel insulating films
709
and
706
. A storage electrode
711
is formed on the contact plug
710
through a barrier film
710
a.
A capacitor insulating film
712
is formed to cover the storage electrode
711
, and a plate electrode
713
made of tungsten nitride is formed to cover the storage electrode
711
and capacitor insulating film
712
.
In this manner, a transistor comprised of the gate electrode
704
, and a capacitor to be connected to this transistor and comprised of the storage electrode
711
, capacitor insulating film
712
, and plate electrode
713
make up the basic unit of the memory cell.
An interlevel insulating film
714
made of an insulator is formed also on the interlevel insulating film
709
including the plate electrode
713
. Although not shown, an interconnection layer to be connected to the bit line
708
and plate electrode
713
(described above) is formed on the interlevel insulating film
714
.
In the above semiconductor device, after the interlevel insulating film is formed on the plate electrode, for example, when a contact between the interconnection formed on the interlevel insulating film on the plate electrode and the silicon substrate is to be formed, high-temperature annealing at approximately 600° C. is sometimes performed. If such a high temperature is applied, cracking may occur in the plate electrode or in the worst case, the plate electrode may be peeled.
SUMMARY OF THE INVENTION
It is, therefore, the principal object of the present invention to provide a method of manufacturing a semiconductor device, by which even if a high temperature is applied in the post-process to a tungsten nitride electrode which forms a capacitor, cracking or peeling will not occur in the electrode.
In order to achieve the above object, according to the present invention, there is provided a semiconductor device comprising at least one interlevel insulating film arranged on a semiconductor substrate, a first electrode made of a metal material and arranged on the interlevel insulating film, a capacitor insulating film made of an insulating metal oxide and arranged on the first electrode, a second electrode made of tungsten nitride and arranged on the capacitor insulating film, and a protective film arranged on the second electrode to suppress outward diffusion of nitrogen from the second electrode.


REFERENCES:
patent: 5641985 (1997-06-01), Tamura et al.
patent: 5851896 (1998-12-01), Summerfelt
patent: 5994183 (1999-11-01), Huang et al.
patent: 6246082 (2001-06-01), Mitarai et al.
patent: 6320244 (2001-11-01), Alers et al.
Suzuki, T. et al., “Comparison of CVD-TiN, PECVD-WNx, and CVD-WSiN as Upper Electrode Materials for Ta2O5 DRAM Capacitors”, Proc. Of Advanced Metallization Conference 1997, pp. 98-99, (1997).

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