Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated
Reexamination Certificate
2011-08-23
2011-08-23
Parekh, Nitin (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
C257S774000, C257SE23169
Reexamination Certificate
active
08004095
ABSTRACT:
A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer.
REFERENCES:
patent: 5111278 (1992-05-01), Eichelberger
patent: 5250843 (1993-10-01), Eichelberger
patent: 5353195 (1994-10-01), Fillion et al.
patent: 5353498 (1994-10-01), Fillion et al.
patent: 5527741 (1996-06-01), Cole et al.
patent: 5703400 (1997-12-01), Wojnarowski et al.
patent: 5841193 (1998-11-01), Eichelberger
patent: 6271469 (2001-08-01), Ma et al.
patent: 6396153 (2002-05-01), Fillion et al.
patent: 7165316 (2007-01-01), Fjelstad
patent: 7189596 (2007-03-01), Mu et al.
patent: 7414309 (2008-08-01), Oi et al.
patent: 7569427 (2009-08-01), Theuss
patent: 7598117 (2009-10-01), Kurita et al.
patent: 7619901 (2009-11-01), Eichelberger et al.
patent: 2005/0139987 (2005-06-01), Okada et al.
patent: 2006/0063312 (2006-03-01), Kurita
patent: 2007/0178622 (2007-08-01), Liu et al.
patent: 2007/0249153 (2007-10-01), Dong
patent: 2008/0054426 (2008-03-01), Ohno et al.
patent: 2008/0090335 (2008-04-01), Morimoto et al.
patent: 2008/0188037 (2008-08-01), Lin
patent: 2008/0313894 (2008-12-01), Fillion et al.
patent: 2009/0267232 (2009-10-01), Morel et al.
Chow Seng Guan
Lin Yaojian
Shim II Kwon
Atkins Robert D.
Parekh Nitin
Patent Law Group
STATS ChipPAC Ltd.
LandOfFree
Semiconductor device and method of forming interconnect... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method of forming interconnect..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of forming interconnect... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2632873