Semiconductor device and method of forming enhanced UBM...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C257S778000, C257SE23060, C257SE21506

Reexamination Certificate

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07989356

ABSTRACT:
A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the first conductive layer. A second conductive layer is formed over first insulating layer and first conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. An under bump metallization layer (UBM) is formed over the third insulating layer and second conductive layer. A UBM build-up structure is formed over the UBM. The UBM build-up structure has a sloped sidewall and is confined within a footprint of the UBM. The UBM build-up structure extends above the UBM to a height of 2-20 micrometers. The UBM build-up structure is formed in sections occupying less than an area of the UBM. A solder bump is formed over the UBM and UBM build-up structure. The sections of the UBM build-up structure provide exits for flux vapor escape.

REFERENCES:
patent: 6853076 (2005-02-01), Datta et al.
patent: 7112522 (2006-09-01), Tsao et al.
patent: 7682961 (2010-03-01), Daubenspeck et al.
patent: 2004/0134974 (2004-07-01), Oh et al.
patent: 2005/0140027 (2005-06-01), Fan

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