Semiconductor device and method of forming embedded passive...

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With electrical contact in hole in semiconductor

Reexamination Certificate

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C257S698000, C438S667000

Reexamination Certificate

active

07859085

ABSTRACT:
A semiconductor die has a first insulating material disposed around a periphery of the die. A portion of the first insulating material is removed to form a through hole via (THV). Conductive material is deposited in the THV. A second insulating layer is formed over an active surface of the die. A first passive circuit element is formed over the second insulating layer. A first passive via is formed over the THV. The first passive via is electrically connected to the conductive material in the THV. The first passive circuit element is electrically connected to the first passive via. A third insulating layer is formed over the first passive circuit element. A second passive circuit element is formed over the third insulating layer. A fourth insulating layer is formed over the second passive circuit element. A plurality of semiconductor die is stacked and electrically interconnected by the conductive via.

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patent: 7648911 (2010-01-01), Pagaila et al.
patent: 2004/0245623 (2004-12-01), Hara et al.
patent: 2005/0046002 (2005-03-01), Lee et al.
patent: 2008/0001285 (2008-01-01), Yang

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