Semiconductor device and method of forming conductive vias...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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C438S458000, C257SE21499, C257SE21599

Reexamination Certificate

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07993976

ABSTRACT:
A semiconductor wafer has a plurality of semiconductor die separated by a peripheral region. A trench is formed in the peripheral region of the wafer. A via is formed the die. The trench extends to and is continuous with the via. A first conductive layer is deposited in the trench and via to form conductive TSV. The first conductive layer is conformally applied or completely fills the trench and via. The trench has a larger area than the vias which accelerates formation of the first conductive layer. A second conductive layer is deposited over a front surface of the die. The second conductive layer is electrically connected to the first conductive layer. The first and second conductive layers can be formed simultaneously. A portion of a back surface of the wafer is removed to expose the first conductive layer. The die can be stacked and electrically interconnected through the TSVs.

REFERENCES:
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patent: 6582992 (2003-06-01), Poo et al.
patent: 6743696 (2004-06-01), Jeung et al.
patent: 6910268 (2005-06-01), Miller
patent: 7215033 (2007-05-01), Lee et al.
patent: 7276799 (2007-10-01), Lee et al.
patent: 2008/0230913 (2008-09-01), Huang et al.

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