Semiconductor device and method of fabrication thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S257000, C438S258000, C438S259000, C438S288000, C257SE21442

Reexamination Certificate

active

07846788

ABSTRACT:
A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.

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Japanese Notice of Grounds of Rejection, w/ English translation thereof, issued in Japanese Patent Application No. JP 2005-173297 dated Jul. 6, 2010.
Japanese Notice of Grounds of Rejection with English translation, issued in Japanese Patent Application No. 2005-173297, mailed Oct. 12, 2010.

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