Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Reexamination Certificate
2007-12-06
2009-11-17
Potter, Roy K (Department: 2822)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
C438S778000
Reexamination Certificate
active
07618900
ABSTRACT:
A semiconductor device may be fabricated according to a method that reduces stain difference of a passivation layer in the semiconductor device. The method may include forming top wiring patterns in a substrate, depositing a primary undoped silicate glass (USG) layer on the top wiring patterns to fill a gap between the top wiring patterns, and coating a SOG layer on the substrate on which the primary USG layer has been deposited. Next, the SOG layer on the surface of the substrate may be removed until the primary USG layer is exposed, and a secondary USG layer may be deposited on the substrate on which the primary USG layer has been exposed.
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patent: 4676867 (1987-06-01), Elkins et al.
patent: 5721548 (1998-02-01), Choe et al.
patent: 2000-195946 (2000-07-01), None
patent: 10-2002-0061384 (2002-07-01), None
Dongbu Hitek Co., Ltd.
Potter Roy K
Workman Nydegger
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