Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond
Patent
1998-02-06
2000-12-26
Clark, Sheila V.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Die bond
257782, 257785, H01L 2348, H01L 2352
Patent
active
061664456
ABSTRACT:
A void-collection section is provided on a GaAs FET chip at a location that avoids a heat-generating region of the chip. Pressure is applied to the rear surface of the substrate corresponding to the heat-generating region of the chip, this causing the removal of a void from immediately under the heat-generating section, and the capture of the void by the void-collection section, thereby suppressing the localized rise in temperature of the chip caused by the existence of the void.
REFERENCES:
patent: 4104676 (1978-08-01), Bednorz et al.
patent: 5001542 (1991-03-01), Tsukagoshi et al.
patent: 5027189 (1991-06-01), Shannon et al.
patent: 5146308 (1992-09-01), Chance et al.
Clark Sheila V.
NEC Corporation
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