Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-03-29
2004-08-10
Guerrero, Maria (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S223000, C438S227000, C438S228000, C438S462000, C438S527000, C438S546000
Reexamination Certificate
active
06773976
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and a method for manufacturing the semiconductor device to reduce plasma charging damage generated during manufacturing of the semiconductor.
2. Background of the Related Art
A related art semiconductor device will be described with reference to FIG.
1
. As shown in
FIG. 1
, when forming a twin well semiconductor device, a n-type well
4
is selectively formed at a required place on a p-type semiconductor substrate
2
.
To form a triple well structure, in addition to the n-type well
4
, a n-type deep well
5
is selectively formed, and a p-type well
3
is formed within the n-type deep well
5
.
Consequently, in either the twin and triple well structures, a current path is formed by charged plasma
1
creating a current during the manufacturing process as follows (1) current path
6
formed by p-type well
3
p-type substrate
2
p-type well
3
; or current path
7
formed by p-type well
3
p-type substrate
2
n-type well
4
.
If any device including a gate oxide film, for example, a MOSFET device, is located in the current path, the gate oxide film sustains damage from the plasma
1
charge.
In general, when manufacturing a semiconductor device using plasma equipment, for example, an etching process for gate patterning, metal etching, interlayer dielectric (ILD) process, inter metal dielectric (IMD) process, and photoresist ashing, a voltage is applied to the gate oxide film during the manufacturing process.
Due to the inequality of the electric charge of the plasma
1
, electric charges of differing amounts accumulate on the gate according to a position of a transistor on an wafer. The electric charges accumulated on the gates induce a voltage to the gate oxide film in a MOS capacitor.
Such a voltage causes a Fowler Nordheim (FN) tunnelling current flow through the gate oxide film, thereby, irreversibly damaging the gate oxide film.
The damage to a gate oxide film destroys or lowers the insulator characteristics of the gate oxide film. As a result, the transistor or MOSFET does not operate normally.
For example, if a negative charge density is high in a certain portion of the device while a positive charge density is high in another portion of the device, current paths (
6
) and (
7
) of
FIG. 1
are formed, and a current flows.
In general, since each transistor is located close to other transistors on a chip, the difference between charge density accumulated on the gates is relatively small as compared to the difference between the gate charge density of transistors located in different chips.
Therefore, most plasma charge damage is not generated through the current path formed between the same chips or adjacent chips, but through the current path formed between the chips relatively distant from each other.
Even in the case of using a n-type semiconductor substrate, rather than a p-type semiconductor substrate, the same plasma charge damage occurs.
The related art semiconductor device and method for manufacturing the semiconductor device have the following problems.
Current paths are formed between wells located in a chip formation area. As a result, a degradation of gate oxide film may be generated by the plasma charge during the process of manufacturing the device. Such degradation of the gate oxide film destroys or lowers the characteristic of the gate oxide film as an insulator, preventing the transistor from operating normally, and reducing the reliability of the device.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a semiconductor device and method for manufacturing the same that substantially reduces one or more of the problems related to the limitations and disadvantages of the related art.
An object of the present invention is to provide a semiconductor device and method for manufacturing the same, in which plasma charge damage generated during the process for manufacturing the device is reduced.
To achieve these and other advantages, and in accordance with the purpose of the present invention as embodied and broadly described, a semiconductor device according to the present invention includes a first conductive semiconductor substrate formed of a first conductive material, a scribe lane area delineating a division area in a process for separating the chips formed on the semiconductor substrate, a second conductive deep well area formed on the entire chip formation area except for the scribe lane area, and second or first conductive well area formed within the deep well area.
In another aspect, a method for manufacturing the semiconductor device in accordance with the present invention includes preparing a first conductive semiconductor substrate, defining the semiconductor substrate with chip formation areas and a scribe lane area which delineates a division area when separately forming isolated chip formation areas, forming a mask on the semiconductor substrate such that the deep well areas are formed over the entire chip formation areas and not the scribe lane area, forming a deep well area on the chip formation areas, and removing the mask to selectively form a second conductive well area and a first conductive well area within the deep well area.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5614445 (1997-03-01), Hirabayashi
patent: 5698454 (1997-12-01), Zommer
patent: 5998282 (1999-12-01), Lukaszek
patent: 6156596 (2000-12-01), Jwo
patent: 6159826 (2000-12-01), Kim et al.
patent: 06005583 (1994-01-01), None
Birch & Stewart Kolasch & Birch, LLP
Guerrero Maria
Hyundai Eletronics Industries Co., Ltd.
LandOfFree
Semiconductor device and method for manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method for manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method for manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3352298