Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-03-11
2002-12-03
Chaudhuri, Olik (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S440000
Reexamination Certificate
active
06489205
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor device and a method for manufacturing the same. More particularly, the present invention relates to a semiconductor device in which respective elements formed in the vicinity of a plurality of isolation oxide films of different thickness have stable characteristics, as well as to a method for manufacturing the semiconductor device mentioned above.
2. Description of the Background Art
There has been known a semiconductor device comprising a single substrate on which are provided an array of memory cells and a peripheral circuit made of a plurality of elements. In the former semiconductor device, a memory section including memory cells is provided with an isolation oxide film for electrically isolating the individual memory cells from one another. Further, a peripheral circuit section having the peripheral circuit is provided with an isolation oxide film for isolating the individual elements from one another.
The isolation oxide film in the memory section is required to be formed precisely, whereas the isolation oxide film in the peripheral circuit section is required to have a high withstanding voltage. The precision of the isolation oxide film becomes worse as the thickness of the isolation oxide film increases. In contrast, the withstanding voltage of the isolation oxide film becomes higher as the thickness of the isolation oxide film increases. For these reasons, in order to produce the former semiconductor device having the structure mentioned above, two types of isolation oxide films of different thickness must be formed on a single substrate.
FIGS. 4A
to
4
F are cross-sectional views for describing a former method for forming two types of isolation oxide films of different thickness on a single substrate.
During the former manufacturing method, an oxide film
12
, a nitride film
14
, and a resist film
15
are formed on a silicon substrate
10
in this sequence (see FIG.
4
A). The surface region of the silicon substrate
10
is divided into a peripheral circuit section
16
and a memory section
17
. In the resist film
15
, an opening
18
is formed on a predetermined area of the peripheral circuit section
16
.
While the resist film
15
is used as a mask, anisotropic etching of the nitride film
14
, etching of the oxide film
12
, and recessing of the silicon substrate
10
are carried out in that order. After completion of recessing of the silicon substrate
10
, the resist film
15
is removed from the surface of the nitride film
14
(see FIG.
4
B). As a result of the foregoing processing, a recess
20
is formed in the peripheral circuit section
16
of the silicon substrate
10
in such a way as to correspond to the opening
18
of the resist film
15
.
Next, the silicon substrate
10
is subjected to thermal oxidation, whereby an isolation oxide film
22
is formed in the recess
20
(see FIG.
4
C). The thermal oxidation of the silicon substrate
10
is carried out under the condition in which a sufficient thickness of the isolation oxide film
22
is ensured; namely, under the condition in which a sufficient withstanding voltage of the peripheral circuit section
16
is ensured.
During the former manufacturing method, a resist film
24
is formed on the nitride film
14
(see FIG.
4
D). The resist film
24
has openings
25
formed on predetermined areas of the memory section
17
.
While the resist film
24
is used as a mask, anisotropic etching of the nitride film
14
, etching of the oxide film
12
, and recessing of the silicon substrate
10
are carried out in this sequence. After completion of recessing of the silicon substrate
10
, the resist film
24
is removed from the surface of the nitride film
14
(see FIG.
4
E). As a result of the foregoing processing, recesses
26
are formed in the memory section
17
of the silicon substrate
10
in such a way as to correspond to the openings
25
of the resist film
24
.
The silicon substrate
10
is then subjected to thermal oxidation, whereby an isolation oxide film
28
is formed in the recesses
26
of the memory section
17
(see FIG.
4
F). The thermal oxidation in this stage is carried out under a condition for ensuring a required thickness of the isolation oxide film
28
. The isolation oxide film
28
of the memory section
17
is not required to have a thickness as thick as that required for the isolation oxide film
22
of the peripheral circuit
16
. Thus, the foregoing processing results in the isolation oxide film
28
which is formed in the memory section
17
with a high dimensional accuracy.
As mentioned above, the former manufacturing method enables formation, on the single silicon substrate
10
, of two types of isolation oxide films of different thickness, i.e., the isolation oxide film
22
having a high withstanding voltage and the isolation oxide film
28
having a high dimensional accuracy. However, in the former manufacturing method, the two types of isolation oxide films
22
and
28
are formed through different processes. Therefore, the former manufacturing method requires complicated manufacturing processes.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the previously-mentioned problems, and a general object of the present invention is to provide a novel and useful semiconductor device and a method for manufacturing the same.
A more specific object of the present invention is to provide a method for manufacturing a semiconductor device which enables formation, through simple processes, of an isolation oxide film with a high dimensional accuracy and another isolation oxide film ensuring a high withstanding voltage.
The above object of the present invention is achieved by a method for manufacturing a semiconductor device including a plurality of isolation oxide films of different thickness. The method includes a step for forming a nitride film on a silicon substrate. The method also includes a step for forming an opening in the nitride film. The method further includes a step for forming an isolation oxide film below the opening through thermal oxidation. In this method, the opening comprises plurality of openings of different opening diameters and at least one of the opening diameters is set to a value of less than 0.6 &mgr;m.
According to the manufacturing method, a silicon substrate is subjected to thermal oxidation while being covered with a silicon nitride film having a plurality of openings. At least one opening diameter of the opening is less than 0.6 &mgr;m. In the area where the opening has an opening diameter of less than 0.6 &mgr;m, through thermal oxidation an isolation oxide film grows at an rate accurately corresponding to the opening diameter. Therefore, according to the manufacturing method, through single thermal oxidation processing, a plurality of isolation oxide films on whose thickness the opening diameters are accurately reflected can be formed on a single silicon substrate.
A second object of the present invention is to provide a semiconductor device including isolation oxide films of different thickness as well as elements which have stable characteristics while being provided in the vicinity of the respective isolation oxide films.
The above object of the present invention is achieved by a semiconductor device having a plurality of isolation oxide films of different thickness. In the semiconductor device, the peak of isolation impurity concentration is situated at substantially the same depth around all the isolation oxide films. Further, the peak of isolation impurity concentration substantially corresponds to the bottom surface of the thinnest isolation oxide films.
According to the semiconductor device, a peak of isolation impurity concentration substantially corresponds to the bottom of a thinnest isolation oxidation film. The thinner an isolation oxide film, the more likely punch-through is to arise between elements provided across the isolation oxide film. Accordingly, in a semiconductor device having a
Blum David S
McDermott & Will & Emery
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