Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-01-22
2008-01-22
Schillinger, Laura M. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S287000, C438S197000
Reexamination Certificate
active
07320917
ABSTRACT:
Gate length is 110 nm±15 nm or shorter (130 nm or shorter in a design rule) or an aspect ratio of an area between adjacent gate electrode structures thereof (ratio of the height of the gate electrode structure to the distance between the gate electrode structures) is 6 or higher. A PSG (HDP-PSG: Phospho Silicate Glass) film containing a conductive impurity is formed as an interlayer insulating film for burying the gate electrode structures at film-formation temperature of 650° C. or lower by a high-density plasma CVD (HDP-CVD) method.
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Fujitsu Limited
Schillinger Laura M.
Westerman, Hattori, Daniels & Adrian , LLP.
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