Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-09-07
2002-05-21
Nguyen, Ha Tran (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S305000, C438S306000, C438S307000
Reexamination Certificate
active
06391725
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a semiconductor device which is applied to access transistors of an SRAM cell to improve its operation performance and a method for fabricating the same.
2. Discussion of the Related Art
A conventional semiconductor device will be described with reference to the attached drawings.
FIG. 2
is a plan view of a conventional semiconductor device and
FIG. 3
is a cross-sectional view showing a structure of a conventional semiconductor device.
As shown in
FIGS. 2 and 3
, a field region and an active region are defined in a semiconductor substrate
1
and a field oxide layer
2
is formed on the field region. A gate electrode
4
having a gate oxide layer
3
is formed on the active region. A sidewall spacer
7
having a predetermined thickness is formed on both sides of the gate electrode
4
. Lightly doped impurity regions
6
are formed beneath surface of the semiconductor substrate
1
both sides of the gate electrode
4
. Source and drain regions
8
are formed beneath the surface of the semiconductor substrate
1
, but not under the gate electrode
4
and the sidewall spacer
7
.
When a semiconductor device having the foregoing structure is applied to access transistors of an SRAM cell, the operation will be described in detail with reference to FIG.
1
.
The operation of writing a data “1” in a first cell node CN
1
will be described. When 5V is applied to a word line, first and second access transistors TA
1
and TA
2
are turned on. Subsequently, 5V is applied to a bitline and another 5V is applied to a bit bar line. Accordingly, data “1” and “0” are written in the first cell node CN
1
and the second cell node CN
2
, respectively. Thus, a second drive transistor TD
2
is turned on and a first drive transistor TD
1
off.
The operation of reading a data “0” in the SRAM cell will be described. First of all, 5V is applied to each of the bitline and the bit bar line. At this time, there is no current flow along the first access transistor TA
1
between the bitline and the first cell node CN
1
in which data “1” has been written. In contrast, current flows from the bit bar line to the second cell node CN
2
along the second access transistor TA
2
due to voltage difference between the bit bar line and the second cell node CN
2
in which data “0” has been written. At this time, the current flowing along the second access transistor TA
2
flows along the second drive transistor abruptly so that the low data written in the second cell node CN
2
comes to being read.
However, the conventional, aforementioned semiconductor device has problems. When a conventional semiconductor device is applied to access transistors of an SRAM cell, on reading data “0” stored in a cell node, the current driving power of access transistors is increased and thus current flows to a second drive transistor to read data “0”. As a result, the total current driving ratio is declined so that data “0” can not be exactly read, whereby the performance of the SRAM cell becomes inferior.
SUMMERY OF THE INVENTION
Therefore, the present invention is directed to a semiconductor device and a method for fabricating the same that substantially obviate one or more of problems due to limitations and disadvantages of the related art.
Additional features and advantages of the invention will be set forth in the description which follows and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a semiconductor device includes a gate insulating layer formed on a semiconductor substrate, a gate electrode formed on the gate insulating layer, lightly doped impurity regions having different lengths beneath surface of the semiconductor substrate at first and second sides of the gate electrode, and heavily doped impurity regions formed beneath the surface of the semiconductor substrate, extending from the lightly doped impurity regions.
In another aspect of the invention, a method for fabricating a semiconductor device includes the steps of providing a semiconductor substrate where an active region is defined, forming a gate electrode having a recess on a predetermined area of the active region to have a gate insulating layer between the gate electrode and the semiconductor substrate, forming lightly doped impurity regions in the active region at both sides of the gate electrode with the gate electrode serving as a mask, forming a sidewall spacer on both sides of the gate electrode, and forming heavily doped impurity regions in the active region with the sidewall spacer serving as a mask.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5276344 (1994-01-01), Arima et al.
patent: 5436482 (1995-07-01), Ogoh
patent: 5780911 (1998-07-01), Park et al.
patent: 5789780 (1998-08-01), Fulford, Jr. et al.
Park Min Wha
Yang Hae Chang
LG Semicon Co. Ltd.
Nguyen Ha Tran
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