Semiconductor device and method for fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257S369000

Reexamination Certificate

active

07932141

ABSTRACT:
A semiconductor device includes an n-type MIS transistor and a p-type MIS transistor. The n-type MIS transistor includes a first gate electrode formed on a first active region and a first sidewall formed on the side face of the first gate electrode. The p-type MIS transistor includes a second gate electrode formed on a second active region, a second sidewall formed on the side face of the second gate electrode and strain layers formed in the second active region. The second sidewall has a smaller thickness than the first sidewall.

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patent: 2006/0157797 (2006-07-01), Tateshita
patent: 2009/0309166 (2009-12-01), Shima
Lee, W. H. et al., “High Performance 65 nm SOI Technology with Enhanced Transistor and Advanced-Low-K BEOL,” IEDM 2005, pp. 61-64.

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