Semiconductor device and method for fabricating the same

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S238000, C438S618000, C438S629000, C438S637000, C257S296000, C257S773000, C257SE27084, C257SE27097, C257SE21645, C257SE21646, C257SE21656, C257SE21660

Reexamination Certificate

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07601630

ABSTRACT:
A method of fabricating a semiconductor memory device and a structure that forms both a resistor and an etching protection layer to reduce a contact resistance. The method of fabricating a semiconductor memory device according to the invention includes forming an insulation layer on a semiconductor substrate having a cell array region, a core region, and a peripheral region, each having at least one transistor formed therein, and forming both a first landing pad in the core region on the insulation layer and a second landing pad in the peripheral region, the first landing pad being overlapped with a part of a first conductive line. The invention reduces the contact resistance and prevents or minimizes a device failure caused by a misalignment, with the simplified process.

REFERENCES:
patent: 5442236 (1995-08-01), Fukazawa
patent: 5895239 (1999-04-01), Jeng et al.
patent: 5918120 (1999-06-01), Huang
patent: 6022776 (2000-02-01), Lien et al.
patent: 6285053 (2001-09-01), Park
patent: 6350649 (2002-02-01), Jeong et al.
patent: 6518671 (2003-02-01), Yang et al.
patent: 2002/0105088 (2002-08-01), Yang et al.
patent: 2003/0015732 (2003-01-01), Park
patent: 2003/0127705 (2003-07-01), Kwak et al.
patent: 2003/0235946 (2003-12-01), Lee et al.
patent: 10-2002-0096093 (2002-12-01), None
English language abstract of Korean Publication No. 10-2002-0096093.

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