Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-01
2005-03-01
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S198000, C438S933000
Reexamination Certificate
active
06861316
ABSTRACT:
On an Si substrate1,a buffer layer2,a SiGe layer3,and an Si cap layer4are formed. A mask is formed on the substrate, and then the substrate is patterned. In this manner, a trench7ais formed so as to reach the Si substrate1and have the side faces of the SiGe layer3exposed. Then, the surface of the trench7ais subjected to heat treatment for one hour at 750° C. so that Ge contained in a surface portion of the SiGe layer3is evaporated. Thus, a Ge evaporated portion8having a lower Ge content than that of other part of the SiGe layer3is formed in part of the SiGe layer3exposed at part of the trench7a. Thereafter, the walls of the trench7aare oxidized.
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Written Opinion for Application No. PCT/JP03/00141; Mailed Sep. 2, 2003.
International Preliminary Examination Report for Application No. PCT/JP03/00141; Mailed Feb. 17, 2004.
“Handotai Process Handbook”; Kabushiki Kaisha Puresu Janaru, Koji Shinohara; Oct. 15, 1996 pp. 131-132.
English Translation of International Search Report for PCT/JP03/00141; Date of Mailing Apr. 30, 2003; ISA Japanese Patent Office.
International Search Report—PCT/JP03/00141; ISA/JPO, date completed: Apr. 15, 2003.
Asai Akira
Hara Yoshihiro
Ohnishi Teruhito
Sorada Haruyuki
Sugahara Gaku
Harness & Dickey & Pierce P.L.C.
Lindsay Jr. Walter L.
Matsushita Electric - Industrial Co., Ltd.
Niebling John F.
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