Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2001-12-27
2004-06-01
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S330000, C438S342000
Reexamination Certificate
active
06743691
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, more particularly to an effective technique for fabricating a fast operation semiconductor device with use of a compound semiconductor material.
In recent years, the communication/information processing field has kept demanding a super fast operation semiconductor element strongly so as to cope with a rapid increase of communication demands or amounts of information to be processed. And, in order to meet such demands, there has appeared a hetero-junction bipolar transistor (hereafter, to be referred to as the HBT) that uses a wide band gap semiconductor for its emitter. Because the HBT comes to have such an emitter of a wide band gap, the back injection of carriers from the base to the emitter is low in amount and the injection efficiency for the emitter is high. The HBT can thus have a high current gain. In addition, the high current gain can be kept even at a high base density. As a result, the base resistance can be reduced, thereby enabling the HBT to be provided with a super fast operation having a high current gain driving performance. This is why the HBT has been employed for such mobile communication terminals as portable telephones, etc. for which the power of the high frequency in the microwave area must be amplified effectively.
For the power amplification transistor employed for a transmission amplifier circuit of such a mobile communication terminal, the current is increased more and more so as to increase the transmission output. Generally, the area of each junction of the bipolar transistor is increased in order to achieve this large current. And, to avoid an increase of the chip area caused by such an increase of the junction area, a multiple-finger structure is employed. The multiple-finger structure enables a plurality of emitters, bases, and collectors disposed in parallel like a striped pattern are connected to each other in parallel.
In a bipolar transistor element, the characteristics of the bipolar transistor is changed sometimes, resulting in straying off the specifications of a transistor element from a vicious circle; for example, the characteristics of the bipolar transistor are changed due to a temperature change, etc. during operation, then the current flow is increased due to such a rising of the temperature, and this current increase causes the temperature further to rise, thereby the current flow is changed significantly. To avoid such a problem, there is a well-known method as disclosed in the official gazette of Japanese patent laid-Open No. Hei 7-7014 (corresponding to U.S. Pat. No. 5,321,279). According to this method, a metallic resistor is added serially to an emitter finger or base finger as a ballast impedance. The metallic resistor is made of, for example, such a metallic material having a high specific resistance as tungsten nitride, tantalum nitride, etc. This method increases the voltage drop at both ends of the ballast impedance when the current is increased, thereby the finger current is reduced. The transistor operation can thus be stabilized.
SUMMARY OF THE INVENTION
However, such a method for adding a metallic resistor has a problem that a new process for forming the metallic resistor must be added, thereby increasing the number of processes. The method also has another problem that requires wiring between the formed metallic resistor and an electrode of the bipolar transistor element and forming a contact area for the wiring. And, this causes the element area to be increased and the fabricating cost to be raised.
Under such circumstances, it is an object of the present invention to provide a technique for forming a ballast resistor by solving those conventional problems, suppressing the number of processes, as well as the element area from increasing.
The above and other objects, as well as other features of the present invention will appear more apparently with the description and the accompanying drawings in this specification.
Hereunder, the outline of some of the inventions to be disposed in this specification will be described briefly.
A semiconductor device of the present invention comprises a semiconductor substrate and a plurality of semiconductor elements, each of which has a collector layer, a base layer, and an emitter layer formed in the semiconductor substrate. The base layer and the emitter layer are separated from each other between a plurality of the semiconductor elements. Each of the semiconductor elements includes a first base electrode connected to the base layer respectively and an emitter electrode connected to the emitter layer. The first base electrodes of the semiconductor elements are connected to each other commonly by a common base wiring and the emitter electrodes of the semiconductor elements are connected to each other commonly by a common emitter wiring. The first base electrode of each of the semiconductor elements is connected to the base layer separated from an end of an emitter junction formed by the emitter layer and the base layer.
Furthermore, the semiconductor device of the present invention comprises a semiconductor substrate made of a compound semiconductor material and a plurality of hetero-junction bipolar transistor type semiconductor elements, each of which has a collector layer, a base layer, and an emitter layer formed in the semiconductor substrate. The base layers of the semiconductor elements are formed like a plurality of base fingers in shape, which are extended independently of others. Each base finger layer has an emitter junction with the emitter layer formed on part thereof and a first base electrode formed so as to be separated from the emitter junction. The emitter layer has an emitter electrode connected thereto and respective emitter electrodes are connected to each other in common by a common emitter wiring, while a common base wiring connects the first base electrodes of the semiconductor elements to each other commonly. The first base electrode of each of the semiconductor elements is connected to the base layer separated from an end of an emitter junction between the emitter layer and the base layer.
According to a configuration of the present invention, therefore, the first base electrode can function as a resistor electrode. And, the base layers of plural semiconductor elements (transistor cells) are connected to each other in parallel via this resistor electrode respectively. And, a single resistor can be added to an effective base area or intrinsic base area that forms an emitter junction.
According to another configuration of the present invention, a resistor having a more stable even value is given between the effective base area and the first base electrode, that is, the resistor electrode, so the second base electrode is formed on the base layer adjacent to an emitter junction. This second base electrode can supply an even base potential to the effective base area (for forming a junction with the emitter layer). Concretely, this second base electrode can supply an even base current to the whole effective base area. This second base electrode should preferably be positioned so as to come in contact with the whole base layer adjacent to the emitter junction, that is, so as to be positioned close to the emitter junction.
According to the present invention described above, the base layer and the emitter layer are separated from each other between a plurality of semiconductor elements (transistor cells), so a single base resistor comes to be connected to each transistor cell, that is, each transistor cell. Consequently, the present invention can limit an object current to each transistor cell stably with use of a base resistor according to such operation characteristics as a current amplification factor of the cell. Consequently, it is possible to improve the heat resistance properties of the whole semiconductor device.
Furthermore, a method of the present invention for fabricating the semiconductor device comprises a process of preparing a semiconductor substrate in which a c
Kurokawa Atsushi
Mochizuki Kazuhiro
Yamane Masao
Mattingly Stanger & Malur, P.C.
Pham Long
Renesas Technology Corp.
Trinh Hoa B.
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