Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-11-09
2003-01-14
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S655000, C438S682000, C438S769000
Reexamination Certificate
active
06506651
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof.
2. Description of the Background Art
With the recent trend toward low-voltage, down-sized semiconductor devices, reduction in source/drain resistance becomes important to increase the operating speed of MOS transistors and to improve current driving capability.
FIGS. 37 through 40
are cross-sectional views illustrating a method of manufacturing a conventional semiconductor device in order of successive steps. An element isolation insulation film
102
formed of a silicon oxide film is first formed in an element isolation region of a silicon substrate
101
and a silicon oxide film
103
is formed on the main surface of the silicon substrate
101
in an element forming region. A polysilicon film
104
is then formed over the entire surface (FIG.
37
). The polysilicon film
104
is patterned by photolithographic techniques to form a gate electrode
105
(FIG.
38
).
The silicon oxide film
103
except that under the gate electrode
105
is removed to form a gate insulation film
106
, and sidewalls
107
formed of silicon oxide films are formed on the side faces of the gate insulation film
106
and of the gate electrode
105
. The exposed main surface of the silicon substrate
101
is doped with impurities by ion implantation. Following this, heat treatment is carried out to form source/drain regions
108
(FIG.
39
).
After a cobalt film is formed across the surface by a sputtering method, cobalt silicide layers
109
and
110
are formed by heat treatment in the upper surfaces of the source/drain regions
108
and of the gate electrode
105
, respectively. The unreacted cobalt film is then removed (FIG.
40
). This will reduce the source/drain and gate resistances, thus increasing the operating speed of MOS transistors and improving current driving capability.
In this method of manufacturing a conventional semiconductor device, however, the cobalt silicide layers
109
are formed only in the upper surfaces of the source/drain regions
108
exposed from the sidewalls
107
and the gate electrode
105
, so there is a problem that the effect of reducing the source/drain resistance may not be sufficient.
SUMMARY OF THE INVENTION
A first aspect of the present invention is directed to a semiconductor device comprising: a substrate; a gate structure selectively formed on a main surface of the substrate, having a laminated structure with a gate insulation film and a gate electrode stacked in this order; a sidewall formed on a side face of the gate structure; a source/drain region selectively formed in the main surface of the substrate, having an impurity concentration of over 1×10
19
/cm
3
under the sidewall; and a metal-semiconductor compound region formed in the main surface of the substrate, extending to a point at least under the sidewall from a portion of the source/drain region exposed from the gate structure.
According to a second aspect of the present invention, in the semiconductor device of the first aspect, an end portion of the metal-semiconductor compound region on the gate structure's side is located under an end portion of the gate structure.
According to a third aspect of the present invention, in the semiconductor device of the first aspect, an end portion of the metal-semiconductor compound region on the gate structure's side is located under the sidewall.
According to a fourth aspect of the present invention, in the semiconductor device of either of the first through third aspects, an end portion of the metal-semiconductor compound region on the gate structure's side is located within the source/drain region.
A fifth aspect of the present invention is directed to a method of manufacturing a semiconductor device, comprising the steps of: (a) selectively forming a gate structure on a main surface of a substrate, the gate structure having a laminated structure with a gate insulation film and a gate electrode stacked in this order; (b) forming an amorphous region in a portion of the main surface of the substrate where a metal-semiconductor compound region is to be formed; and (c) forming the metal-semiconductor compound region by silicidation of the amorphous region.
According to a sixth aspect of the present invention, in the step (b) of the method of the fifth aspect, the amorphous region is formed by implanting heavy ions into the substrate with the gate structure as a mask.
According to a seventh aspect of the present invention, in the method of the fifth aspect, the step (b) comprises the steps of: (b-1) forming a sidewall on a side face of the gate structure; and (b-2) implanting heavy ions into the substrate with the gate structure and the sidewall as masks.
According to an eighth aspect of the present invention, in the step (b) of the method of either the sixth or seventh aspect, the heavy ions are angularity implanted into the substrate with respect to a normal to the main surface of the substrate.
According to a ninth aspect of the present invention, the method of the fifth aspect further comprises the steps of: (d) forming a sidewall on a side face of the gate structure; (e) doping the substrate with impurities using the gate structure and the sidewall as masks; and (f) forming a source/drain region in the main surface of the substrate by thermal diffusion of the impurities in the substrate, wherein, in the step (b), the amorphous region is simultaneously formed by doping with the impurities in the step (e), wherein the step (c) is performed between the step (e) and the step (f).
According to a tenth aspect of the present invention, in the step (b) of the method of the fifth aspect, the amorphous region is formed by forming a sidewall on a aside face of the gate structure, the sidewall being made of a material that produces, with the substrate, such high stress that the substrate becomes amorphous.
An eleventh aspect of the present invention is directed to a method of manufacturing a semiconductor device, comprising the steps of: (a) selectively forming a gate structure on a main surface of a substrate, the gate structure having a laminated structure with a gate insulation film and a gate electrode stacked in this order; (b) forming a sidewall on a side face of the gate structure; (c) forming a depression by digging in a portion of the main surface of the substrate where the gate structure and the sidewall are not formed; and (d) forming a metal-semiconductor compound region by silicidation of the substrate from a surface of the depression.
According to a twelfth aspect of the present invention, in the step (c) of the method of the eleventh aspect, the depression is formed by isotropic etching of the substrate.
According to a thirteenth aspect of the present invention, in the method of the eleventh aspect, the step (b) comprises the steps of: (b-1) forming an insulation film on a structure obtained by the step (a); and (b-2) etching the insulation film by a high etch rate of anisotropic etching in a depth direction of the substrate, wherein, in the step (c), the depression is formed by the anisotropic etching.
According to a fourteenth aspect of the present invention, in the method of the eleventh aspect, the step (d) comprises the steps of: (d-1) forming a metal film on a surface of the depression by sputtering of a metallic material; and (d-2) inducing a reaction between the metal film and the substrate by heat treatment to form the metal-semiconductor compound region, wherein, in the step (d-1), the metallic material is angularity sputtered on the surface of the depression with respect to a normal to the main surface of the substrate.
According to a fifteenth aspect of the present invention, the method of the eleventh aspect further comprises: (e) digging in an upper surface of the gate electrode to a predetermined depth; and (f) after the step (e), forming a metal-semiconductor compound layer by silicidation of a resultant upper surface of the gate electrode.
According to a sixteenth as
Nishida Yukio
Oda Hidekazu
Oishi Toshiyuki
Sayama Hirokazu
Lindsay Walter
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Niebling John F.
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