Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-08-05
2002-01-01
Faberry, Wael (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S397000, C438S387000, C438S638000
Reexamination Certificate
active
06335241
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a stacked DRAM capacitor.
In recent years, as more and more circuit components have been squeezed into semiconductor integrated circuits, the minimum work dimensions have been getting smaller and the size of memory cells has been decreasing. As a result, the capacitor area in a memory cell has become very small. A decrease in the memory cell area results in a decrease in the capacity of the capacitor (storage capacity: Cs). The capacity of the capacitor has to be greater than a specific value from the viewpoints of sensitivity, soft errors, and noise in circuits.
The following two methods of increasing the capacity of a capacitor have been examined. A first method is to make the surface area of a capacitor as large as possible by forming the capacitor three-dimensionally. A second method is to use a high-permittivity insulating film (what is called a high E film) as a capacitor insulating film.
After the generations of design rules of 0.15 microns or less (or after the 1-GB DRAM generation), the processing of complex three-dimensional storage node electrodes (SN electrodes) has become increasingly difficult. Therefore, the method of using a high-permittivity insulating film as a capacitor insulating film is very important in making the capacity of a capacitor greater.
A typical high-permittivity insulating film is a (Ba, Sr) TiO
3
(hereinafter, abbreviated as BST) film. For use of a BST film, the idea of using an Ru film, whose oxide is conductive (e.g., an RuO
2
film is conductive), or a stacked film of RuO
2
film/Ru film as an SN electrode has been examined (see S. Yamamichi, et al., “Technical Digest,” IEDM, 1995, pp. 119-122). Hereinafter, a stacked DRAM capacitor having such a structure will be explained by reference to FIG.
37
.
First, element isolating regions
102
are formed at the surface of a p-type Si substrate
101
. Thereafter, a gate insulating film
103
a
, a gate electrode (a polycrystalline silicon film
103
b
and a WSi film
103
c
), an SiN film
104
, a source/drain diffused layer
105
, an SiN film
106
, and an interlayer insulating film
108
are formed.
Next, polycrystalline silicon films
107
a
and
107
b
are embedded in an SN electrode contact region and a bit-line contact region. Thereafter, interlayer insulating films
109
and
111
are formed and a bit line
110
and an SN contact are formed.
Then, a TiSi
X
film
113
, a TiN film
114
, an Ru film
115
, and an RuO
2
film
116
are stacked. These stacked layers are patterned by normal lithographic techniques and RIE techniques to form an SN electrode. Thereafter, a high-permittivity insulating film
117
, such as a BST film, is formed and then an upper electrode
118
(e.g., a stacked layer film of TiN film/Al film) is formed.
When the SN electrode is formed by the above conventional manufacturing method, the following problems arise.
When the SN electrode is formed by ordinary lithographic techniques and RIE techniques, the top corners of the SN electrode have right angles (or sometimes acute angles). This permits an electric field to concentrate at the top corners, resulting in an increase in leakage current in the capacitor insulating film. As a result of the SN electrode being patterned by RIE techniques, roughness of the side faces of the resist are amplified and transferred to the side faces of the SN electrode. The roughness of the side faces of the SN electrode increases leakage current in the capacitor insulating film.
Furthermore, the formation of the SN electrode by lithographic techniques makes the SN electrode liable to shift in position. Therefore, when the capacitor insulating film is formed, part of the plug can be exposed. Consequently, in forming a BST film serving as a capacitor insulating film, the metal plug can be oxidized. The oxidization of the metal plug would cause the following problems: a poorer electrical connection between the SN electrode and the plug and the plug film more liable to come off due to volume expansion caused by oxidation. To overcome these problems, a method of forming a barrier metal layer on the surface of the plug has been proposed. This method, however, has the following problems: the barrier metal has insufficient resistance to oxidation and the number of processes of manufacturing the barrier metal layer increases.
Moreover, when the SN electrode is formed on the plug and insulating film, it is desirable that such an SN electrode material should be used as has not only good electrical connection with the plug but also good adhesion to the insulating film. However, it is difficult to form an SN electrode that meets both of the requirements.
As described above, the conventional stacked DRAM capacitor has several problems stemming from the structure of the SN electrode and the manufacturing method and is not necessarily acceptable in terms of the electrical characteristics and reliability of the capacitor.
BRIEF SUMMARY OF THE INVENTION
It is, accordingly, an object of the present invention to provide a semiconductor device with capacitors excellent in electrical characteristics and reliability and a manufacturing method thereof.
According to a first aspect of the present invention, there is provided a semiconductor device with a charge holding capacitor, the capacitor comprising, a lower electrode connected to one of the source and drain of an MIS transistor; a capacitor insulating film formed on the top face and side faces of the lower electrode; and an upper electrode formed on the capacitor insulating film, wherein the side faces of the lower electrode are so formed that they widen gradually as they go downward, and the side faces near the bottom of the lower electrode are in contact with an insulating film different from the capacitor insulating film.
With the invention, since the side faces of the lower electrode (corresponding to a storage node electrode) are so formed that they widen gradually as they go downward, the top corners of the lower electrode have an obtuse angle. This alleviates the concentration of electric field at the top corners, reducing leakage current in the capacitor insulating film. The improved coverage of the capacitor insulating film promotes the thinning of the capacitor insulating film, which increases the capacity of the capacitor. Furthermore, the uniformity of the film thickness of the upper electrode (corresponding to the plate electrode) is improved, providing the stable capacitor. Moreover, the increased side face area of the lower electrode increases the capacity of the capacitor.
In the first aspect of the invention, the side faces near the bottom of the lower electrode are in contact with the insulating film different from the capacitor insulating film. When the side faces of the lower electrode are so formed that they widen gradually as they go downward, the bottom corners of the lower electrode have an acute angle, which may permit an electric field to concentrate there. In the first aspect of the invention, because the insulating film is in contact with the bottom corners, the leakage current in the capacitor insulating film caused by the concentration of electric field is suppressed.
As described above, with the first aspect of the invention, not only does leakage current in the capacitor is reduced, but the capacity of the capacitor is also increased. Consequently, it is possible to provide a stacked DRAM excellent in reliability and characteristics.
According to a second aspect of the invention, there is provided a method of manufacturing semi-conductor device, comprising: the step of forming an insulating film on a substrate in which an MIS transistor has been formed; the step of removing part of the insulating film to make a hole whose side faces widen gradually as they go downward; the step of embedding in the hole a conducting film that is connected to one of the source and drain of the MIS transistor and is to make a lower electrode of a capacitor; the
Eguchi Kazuhiro
Hieda Katsuhiko
Suguro Kyoichi
Yamazaki Soichi
Faberry Wael
Toledo Fernando
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