Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure
Reexamination Certificate
2008-05-27
2008-05-27
Jackson, Jerome (Department: 2815)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
Having specified scribe region structure
C438S106000, C438S127000, C257S787000, C257S678000, C257SE21599
Reexamination Certificate
active
07378333
ABSTRACT:
The present invention is a semiconductor device having the semiconductor element obtained by cutting a semiconductor wafer with the electrode pad formed on one side along a scribe line, a semiconductor element protective layer on the semiconductor element which has a opening on the pad, a stress cushioning layer on the layer which has the opening on the pad, a lead wire portion reaching the layer from the electrode pad via the openings, external electrodes on the lead wire portion, and the conductor protective layer on the layers, the layer and the conductor protective layer forming the respective end faces on the end surface of the semiconductor element inside the scribe line and exposing the range from the end face of the end surface to the inside of the scribe line.
REFERENCES:
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5757078 (1998-05-01), Matsuda
patent: 5773888 (1998-06-01), Hosomi et al.
patent: 5888849 (1999-03-01), Johnson
patent: 6097085 (2000-08-01), Ikemizu et al.
patent: 6111317 (2000-08-01), Okada et al.
patent: 6258631 (2001-07-01), Ito et al.
patent: 6313532 (2001-11-01), Shimoshitaka et al.
patent: 6320267 (2001-11-01), Yukawa
patent: 6326701 (2001-12-01), Shinogi et al.
patent: 6452270 (2002-09-01), Huang
patent: 6608389 (2003-08-01), Hashimoto
patent: 6624504 (2003-09-01), Inour et al.
patent: 2002/0068424 (2002-06-01), Hashimoto
patent: 2002/0130412 (2002-09-01), Nagai et al.
patent: 09-232256 (1997-09-01), None
patent: 10-027827 (1998-01-01), None
patent: 10-092865 (1998-04-01), None
Nikkei Microdevices, CSP, Feb. 1998, pp. 40-64.
Nikkei Microdevices, CSP, Apr. 1998, pp. 164-167.
Anjo Ichiro
Kazama Atsushi
Nishimura Asao
Ogino Masahiko
Satoh Toshiya
Antonelli, Terry Stout & Kraus, LLP.
Diaz José R
Jackson Jerome
Renesas Technology Corp.
LandOfFree
Semiconductor device and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and manufacturing method thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2786088