Semiconductor device and manufacturing method of the same

Details Semiconductor device and manufacturing method of the same Semiconductor device and manufacturing method of the same

1996-12-24

1999-02-16

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438300, H01L 21336

Patent

active

058720391

ABSTRACT:
The present invention discloses a MOS transistor which is capable of reducing an area of a diffusion layer of a source and drain, and is capable of reducing the number of manufacturing processes while enhancing flatness of a surface of the device. A selective silicon epitaxial layer is formed in an element region which is defined by an element isolation insulating layer formed in a silicon substrate. In the element isolation insulation layer, a polysilicon layer and a selective polysilicon layer connected to the selective silicon epitaxial layer are formed as a source and drain electrode. An LDD region and a source and drain region are formed in the selective silicon epitaxial layer, and a leading electrode for the source and drain region is formed in the source and drain electrode. The source and drain electrode can be formed by one photolithography process, and a margin between the gate electrode and the element isolation insulating layer can be reduced, whereby an area of a diffusion layer of the source and drain is reduced.

REFERENCES:
patent: 4966861 (1990-10-01), Mieno et al.
patent: 5118639 (1992-06-01), Roth et al.
patent: 5198378 (1993-03-01), Rodder et al.
patent: 5213991 (1993-05-01), Inokawa et al.
patent: 5352631 (1994-10-01), Sitaram et al.
European Search Report, dated Jun. 23, 1997.
"High Performance FET Structure Made Using Medium to Low Temperature Epitaxy", IBM Technical Disclosure Bulletin, vol. 33, No. 11, Apr. 1991, pp. 53-55.
J. M. Sung et al.; "A High Performance Super Self-Aligned 3 V/5 V BiCMOS Technology . . . Applications"; IEEE Transactions on Electron Devices, vol. 42, No. 3, Mar. 1995, pp. 513-522.

Affiliated with

Also associated with

Rating

Semiconductor device and manufacturing method of the same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device and manufacturing method of the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and manufacturing method of the same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2061976