Semiconductor device and manufacture method of the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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148DIG126, H01L 218236

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active

057504296

ABSTRACT:
In a semiconductor device of the insulated gate type, a side wall silicon oxide layer of a desired width is formed on each side wall of a gate electrode and a silicon oxide layer to reduce a distance between the contact end of a source electrode with an N.sup.+ -type source region and the internal end of the gate electrode thereby to decrease the on-resistance even if the impurity concentration of the N.sup.+ -type is determined to be low. Since the impurity concentration of the N.sup.+ -type source region is lower than that of a P.sup.+ -type body region and higher than the surface impurity concentration of a P-type body region, the base width of a parasitic bipolar transistor related to the P-type body region is maintained in a proper value without increasing the depth of the N.sup.+ -type source region in excess.

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