Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-12-09
2000-10-10
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438264, 438265, 438287, H01L 21336
Patent
active
061301302
ABSTRACT:
An ONO layer 18 located vicinity of a transistor TR1 for programming is removed. A floating gate FG1 of the transistor TR1 is formed by carrying out etching of a polysilicon layer 16. Then, an inter-layer film SM1 of the transistor TR1 is formed by carrying out oxidation process. The inter-layer film SM1 is formed so as to cover the floating gate FG1. Arsenic is implanted ionically into a semiconductor-substrate 12 using the floating gate FG1 and the inter-layer film SM1 as a mask. Ions of the arsenic thus implanted do not pass through the inter-layer film SM1 and are stopped at the surface. Because the inter-layer film SM1 is made of a silicon oxidation layer formed relatively thick. So that, the inter-layer film SM1 maintains its charge-storage characteristic originally owns even when the ion implantation is carried out.
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Shimoji Noriyuki
Tsuruta Masataka
Yonezawa Takuya
Rohm & Co., Ltd.
Trinh Michael
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