Semiconductor device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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C365S201000

Reexamination Certificate

active

07996735

ABSTRACT:
To realize a fast and highly reliable phase-change memory system of low power consumption, a semiconductor device includes: a memory device which includes a first memory array having a first area including a plurality of first memory cells and a second area including a plurality of second memory cells; a controller coupled to the memory device to issue a command to the memory device; and a condition table for storing a plurality of trial writing conditions. The controller performs trial writing in the plurality of second memory cells a plurality of times based on the plurality of trial writing conditions stored in the condition table, and determines writing conditions in the plurality of first memory cells based on a result of the trial writing. The memory device performs writing in the plurality of first memory cells based on the writing conditions instructed from the controller.

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