Semiconductor device

Electronic digital logic circuitry – With test facilitating feature

Reexamination Certificate

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Details

C326S040000, C714S724000

Reexamination Certificate

active

06297662

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor device which is capable of efficiently conducting a burn-in test.
BACKGROUND OF THE INVENTION
FIG. 8
is a diagram showing a structure of a conventional semiconductor device for conducting a burn-in test. This semiconductor device is disclosed, for example, in Japanese Patent Application Laid-Open (JP-A) No. HEI 7-98358. With reference to
FIG. 8
, the conventional semiconductor device is constituted so as to have a circuit for generating test data at the time of the burn-in test in which a feedback loop is provided in a serial test circuit composed of four flip-flops (hereinafter, shown as F/F)
1000
through
4000
. The F/Fs
1000
through
4000
are connected with each other in series by mutually connecting the serial input terminals SI and serial output terminals SO.
In addition, in the F/Fs
1000
through
4000
, the data which is supplied to the serial input terminals SI in a serial mode where input CP is “1”, input A is “0” and input B is “1” is directly outputted into serial output terminals SO and output terminals Q. When an input TEST is “0”, an output from the serial output terminal SO of the F/F
4000
on the final stage is inverted via the feedback loop so as to be given to the serial input of the F/F
1000
at the first stage. That is, when the input TEST is “0” in the serial mode, “0” and “1” are outputted alternately in a closed loop of the four F/Fs
1000
through
4000
.
The values of “0” and “1” as activation signals of the burn-in test are supplied to the logic blocks
5000
through
7000
, which are connected respectively with the F/Fs
1000
through
4000
so as to become a circuit to be tested. As a result, the logic blocks
5000
through
7000
are activated.
Accordingly, the logic blocks are activated without supplying a clock signal from the outside and the burn-in test can be conducted.
The burn-in test is conducted by the conventional semiconductor device on condition that the logic blocks
5000
through
7000
are activated. If any one of the logic blocks is not activated then there is possibility that the output Q of the F/Fs is stopped.
Moreover, it is difficult to specify which logic block is defective.
Further, in order to obtain a semiconductor device which is capable of efficiently conducting a burn-in test, it is necessary to give a voltage stress to all nodes of the logic blocks via burn-in test terminals which should be as few as possible, considering the a restriction (the number of drivers or the pattern length of the burn-in apparatus) of a burn-in apparatus.
However, compared with the number of input terminals in the semiconductor device there is a limitation to the number of the drivers in the burn-in apparatus. Therefore, desired data cannot be inputted into the logic blocks of the semiconductor device by freely combining them, and thus it is difficult to invert all the nodes.
SUMMARY OF THE INVENTION
In light of the problems described above, it is an object of the present invention to provide a semiconductor device which is capable of efficiently conducting a burn-in test.
In the semiconductor device of the present invention, a burn-in test circuit has an XOR circuit to which, when an output signal and a burn-in input signal of one logic block is supplied, then the other logic blocks are activated. Therefore, even if it is difficult to activate one logic block, the burn-in test can be continued without stopping the outputs of the F/F thereafter.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.


REFERENCES:
patent: 5072448 (1991-12-01), Atwell et al.
patent: 5361264 (1994-11-01), Lewis
patent: 5446768 (1995-08-01), Griffin et al.
patent: 5717701 (1998-02-01), Angelotti et al.
patent: 2-170070 A (1990-06-01), None
patent: 7-98358 A (1995-04-01), None
patent: 10-339762 A (1998-12-01), None
patent: 2000227458-A (2000-08-01), None

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